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-rw-r--r--arch/mips/oprofile/op_model_loongson2.c9
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index 475ff46712ab..29e2326b6257 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2009 Lemote Inc. 4 * Copyright (C) 2009 Lemote Inc.
5 * Author: Yanhua <yanh@lemote.com> 5 * Author: Yanhua <yanh@lemote.com>
6 * Author: Wu Zhangjin <wuzj@lemote.com> 6 * Author: Wu Zhangjin <wuzhangjin@gmail.com>
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -47,8 +47,6 @@ static struct loongson2_register_config {
47 int cnt1_enabled, cnt2_enabled; 47 int cnt1_enabled, cnt2_enabled;
48} reg; 48} reg;
49 49
50DEFINE_SPINLOCK(sample_lock);
51
52static char *oprofid = "LoongsonPerf"; 50static char *oprofid = "LoongsonPerf";
53static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); 51static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
54/* Compute all of the registers in preparation for enabling profiling. */ 52/* Compute all of the registers in preparation for enabling profiling. */
@@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
115 uint64_t counter, counter1, counter2; 113 uint64_t counter, counter1, counter2;
116 struct pt_regs *regs = get_irq_regs(); 114 struct pt_regs *regs = get_irq_regs();
117 int enabled; 115 int enabled;
118 unsigned long flags;
119 116
120 /* 117 /*
121 * LOONGSON2 defines two 32-bit performance counters. 118 * LOONGSON2 defines two 32-bit performance counters.
@@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
136 counter1 = counter & 0xffffffff; 133 counter1 = counter & 0xffffffff;
137 counter2 = counter >> 32; 134 counter2 = counter >> 32;
138 135
139 spin_lock_irqsave(&sample_lock, flags);
140
141 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) { 136 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
142 if (reg.cnt1_enabled) 137 if (reg.cnt1_enabled)
143 oprofile_add_sample(regs, 0); 138 oprofile_add_sample(regs, 0);
@@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
149 counter2 = reg.reset_counter2; 144 counter2 = reg.reset_counter2;
150 } 145 }
151 146
152 spin_unlock_irqrestore(&sample_lock, flags);
153
154 write_c0_perfcnt((counter2 << 32) | counter1); 147 write_c0_perfcnt((counter2 << 32) | counter1);
155 148
156 return IRQ_HANDLED; 149 return IRQ_HANDLED;