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-rw-r--r--arch/mips/mti-malta/malta-pci.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index bf80921f2f56..284dea54faf5 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -241,8 +241,9 @@ void __init mips_pcibios_init(void)
241 return; 241 return;
242 } 242 }
243 243
244 if (controller->io_resource->start < 0x00001000UL) /* FIXME */ 244 /* Change start address to avoid conflicts with ACPI and SMB devices */
245 controller->io_resource->start = 0x00001000UL; 245 if (controller->io_resource->start < 0x00002000UL)
246 controller->io_resource->start = 0x00002000UL;
246 247
247 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ 248 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
248 ioport_resource.end = controller->io_resource->end; 249 ioport_resource.end = controller->io_resource->end;
@@ -253,7 +254,7 @@ void __init mips_pcibios_init(void)
253} 254}
254 255
255/* Enable PCI 2.1 compatibility in PIIX4 */ 256/* Enable PCI 2.1 compatibility in PIIX4 */
256static void __init quirk_dlcsetup(struct pci_dev *dev) 257static void __devinit quirk_dlcsetup(struct pci_dev *dev)
257{ 258{
258 u8 odlc, ndlc; 259 u8 odlc, ndlc;
259 (void) pci_read_config_byte(dev, 0x82, &odlc); 260 (void) pci_read_config_byte(dev, 0x82, &odlc);