diff options
Diffstat (limited to 'arch/mips/mti-malta/malta-int.c')
-rw-r--r-- | arch/mips/mti-malta/malta-int.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 647b86383184..e364af70e6cf 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -84,10 +84,10 @@ static inline int mips_pcibios_iack(void) | |||
84 | 84 | ||
85 | /* Flush Bonito register block */ | 85 | /* Flush Bonito register block */ |
86 | (void) BONITO_PCIMAP_CFG; | 86 | (void) BONITO_PCIMAP_CFG; |
87 | iob(); /* sync */ | 87 | iob(); /* sync */ |
88 | 88 | ||
89 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); | 89 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); |
90 | iob(); /* sync */ | 90 | iob(); /* sync */ |
91 | irq &= 0xff; | 91 | irq &= 0xff; |
92 | BONITO_PCIMAP_CFG = 0; | 92 | BONITO_PCIMAP_CFG = 0; |
93 | break; | 93 | break; |
@@ -136,7 +136,7 @@ static void malta_ipi_irqdispatch(void) | |||
136 | 136 | ||
137 | irq = gic_get_int(); | 137 | irq = gic_get_int(); |
138 | if (irq < 0) | 138 | if (irq < 0) |
139 | return; /* interrupt has already been cleared */ | 139 | return; /* interrupt has already been cleared */ |
140 | 140 | ||
141 | do_IRQ(MIPS_GIC_IRQ_BASE + irq); | 141 | do_IRQ(MIPS_GIC_IRQ_BASE + irq); |
142 | } | 142 | } |
@@ -149,7 +149,7 @@ static void corehi_irqdispatch(void) | |||
149 | struct pt_regs *regs = get_irq_regs(); | 149 | struct pt_regs *regs = get_irq_regs(); |
150 | 150 | ||
151 | printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n"); | 151 | printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n"); |
152 | printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n" | 152 | printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n" |
153 | "Cause : %08lx\nbadVaddr : %08lx\n", | 153 | "Cause : %08lx\nbadVaddr : %08lx\n", |
154 | regs->cp0_epc, regs->cp0_status, | 154 | regs->cp0_epc, regs->cp0_status, |
155 | regs->cp0_cause, regs->cp0_badvaddr); | 155 | regs->cp0_cause, regs->cp0_badvaddr); |
@@ -249,20 +249,20 @@ static inline unsigned int irq_ffs(unsigned int pending) | |||
249 | * on hardware interrupt 0 (MIPS IRQ 2)) like: | 249 | * on hardware interrupt 0 (MIPS IRQ 2)) like: |
250 | * | 250 | * |
251 | * MIPS IRQ Source | 251 | * MIPS IRQ Source |
252 | * -------- ------ | 252 | * -------- ------ |
253 | * 0 Software (ignored) | 253 | * 0 Software (ignored) |
254 | * 1 Software (ignored) | 254 | * 1 Software (ignored) |
255 | * 2 Combined hardware interrupt (hw0) | 255 | * 2 Combined hardware interrupt (hw0) |
256 | * 3 Hardware (ignored) | 256 | * 3 Hardware (ignored) |
257 | * 4 Hardware (ignored) | 257 | * 4 Hardware (ignored) |
258 | * 5 Hardware (ignored) | 258 | * 5 Hardware (ignored) |
259 | * 6 Hardware (ignored) | 259 | * 6 Hardware (ignored) |
260 | * 7 R4k timer (what we use) | 260 | * 7 R4k timer (what we use) |
261 | * | 261 | * |
262 | * We handle the IRQ according to _our_ priority which is: | 262 | * We handle the IRQ according to _our_ priority which is: |
263 | * | 263 | * |
264 | * Highest ---- R4k Timer | 264 | * Highest ---- R4k Timer |
265 | * Lowest ---- Combined hardware interrupt | 265 | * Lowest ---- Combined hardware interrupt |
266 | * | 266 | * |
267 | * then we just return, if multiple IRQs are pending then we will just take | 267 | * then we just return, if multiple IRQs are pending then we will just take |
268 | * another exception, big deal. | 268 | * another exception, big deal. |
@@ -396,7 +396,7 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); | |||
396 | 396 | ||
397 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { | 397 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { |
398 | { X, X, X, X, 0 }, | 398 | { X, X, X, X, 0 }, |
399 | { X, X, X, X, 0 }, | 399 | { X, X, X, X, 0 }, |
400 | { X, X, X, X, 0 }, | 400 | { X, X, X, X, 0 }, |
401 | { 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 401 | { 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
402 | { 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 402 | { 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
@@ -410,7 +410,7 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { | |||
410 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 410 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
411 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 411 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
412 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, | 412 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
413 | { X, X, X, X, 0 }, | 413 | { X, X, X, X, 0 }, |
414 | /* The remainder of this table is initialised by fill_ipi_map */ | 414 | /* The remainder of this table is initialised by fill_ipi_map */ |
415 | }; | 415 | }; |
416 | #undef X | 416 | #undef X |
@@ -634,7 +634,7 @@ void malta_be_init(void) | |||
634 | 634 | ||
635 | static char *tr[8] = { | 635 | static char *tr[8] = { |
636 | "mem", "gcr", "gic", "mmio", | 636 | "mem", "gcr", "gic", "mmio", |
637 | "0x04", "0x05", "0x06", "0x07" | 637 | "0x04", "0x05", "0x06", "0x07" |
638 | }; | 638 | }; |
639 | 639 | ||
640 | static char *mcmd[32] = { | 640 | static char *mcmd[32] = { |
@@ -673,10 +673,10 @@ static char *mcmd[32] = { | |||
673 | }; | 673 | }; |
674 | 674 | ||
675 | static char *core[8] = { | 675 | static char *core[8] = { |
676 | "Invalid/OK", "Invalid/Data", | 676 | "Invalid/OK", "Invalid/Data", |
677 | "Shared/OK", "Shared/Data", | 677 | "Shared/OK", "Shared/Data", |
678 | "Modified/OK", "Modified/Data", | 678 | "Modified/OK", "Modified/Data", |
679 | "Exclusive/OK", "Exclusive/Data" | 679 | "Exclusive/OK", "Exclusive/Data" |
680 | }; | 680 | }; |
681 | 681 | ||
682 | static char *causes[32] = { | 682 | static char *causes[32] = { |