aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/momentum/ocelot_c/setup.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/momentum/ocelot_c/setup.c')
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c27
1 files changed, 14 insertions, 13 deletions
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 15998d8a9341..bd02e60d037a 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -54,6 +54,7 @@
54#include <linux/pm.h> 54#include <linux/pm.h>
55#include <linux/timex.h> 55#include <linux/timex.h>
56#include <linux/vmalloc.h> 56#include <linux/vmalloc.h>
57#include <linux/mv643xx.h>
57 58
58#include <asm/time.h> 59#include <asm/time.h>
59#include <asm/bootinfo.h> 60#include <asm/bootinfo.h>
@@ -64,9 +65,9 @@
64#include <asm/processor.h> 65#include <asm/processor.h>
65#include <asm/ptrace.h> 66#include <asm/ptrace.h>
66#include <asm/reboot.h> 67#include <asm/reboot.h>
68#include <asm/marvell.h>
67#include <linux/bootmem.h> 69#include <linux/bootmem.h>
68#include <linux/blkdev.h> 70#include <linux/blkdev.h>
69#include <asm/mv64340.h>
70#include "ocelot_c_fpga.h" 71#include "ocelot_c_fpga.h"
71 72
72unsigned long marvell_base; 73unsigned long marvell_base;
@@ -252,22 +253,22 @@ void __init plat_setup(void)
252 /* shut down ethernet ports, just to be sure our memory doesn't get 253 /* shut down ethernet ports, just to be sure our memory doesn't get
253 * corrupted by random ethernet traffic. 254 * corrupted by random ethernet traffic.
254 */ 255 */
255 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); 256 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
256 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); 257 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
257 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); 258 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
258 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); 259 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
259 do {} 260 do {}
260 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); 261 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
261 do {} 262 do {}
262 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); 263 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
263 do {} 264 do {}
264 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); 265 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
265 do {} 266 do {}
266 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); 267 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
267 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), 268 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
268 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); 269 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
269 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), 270 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
270 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); 271 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
271 272
272 /* Turn off the Bit-Error LED */ 273 /* Turn off the Bit-Error LED */
273 OCELOT_FPGA_WRITE(0x80, CLR); 274 OCELOT_FPGA_WRITE(0x80, CLR);