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-rw-r--r--arch/mips/mm/c-r3k.c2
-rw-r--r--arch/mips/mm/cache.c16
-rw-r--r--arch/mips/mm/cerr-sb1.c9
-rw-r--r--arch/mips/mm/dma-default.c17
-rw-r--r--arch/mips/mm/init.c6
-rw-r--r--arch/mips/mm/pg-sb1.c3
6 files changed, 37 insertions, 16 deletions
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index d1af42c2a52e..59868a1edf66 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -260,7 +260,7 @@ static void r3k_flush_cache_page(struct vm_area_struct *vma, unsigned long page,
260{ 260{
261} 261}
262 262
263static void local_r3k_flush_data_cache_page(unsigned long addr) 263static void local_r3k_flush_data_cache_page(void *addr)
264{ 264{
265} 265}
266 266
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 31819c58bffa..4e8f1b683376 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -3,7 +3,8 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1994 - 2003 by Ralf Baechle 6 * Copyright (C) 1994 - 2003, 07 by Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 MIPS Technologies, Inc.
7 */ 8 */
8#include <linux/init.h> 9#include <linux/init.h>
9#include <linux/kernel.h> 10#include <linux/kernel.h>
@@ -88,6 +89,19 @@ void __flush_dcache_page(struct page *page)
88 89
89EXPORT_SYMBOL(__flush_dcache_page); 90EXPORT_SYMBOL(__flush_dcache_page);
90 91
92void __flush_anon_page(struct page *page, unsigned long vmaddr)
93{
94 if (pages_do_alias((unsigned long)page_address(page), vmaddr)) {
95 void *kaddr;
96
97 kaddr = kmap_coherent(page, vmaddr);
98 flush_data_cache_page((unsigned long)kaddr);
99 kunmap_coherent(kaddr);
100 }
101}
102
103EXPORT_SYMBOL(__flush_anon_page);
104
91void __update_cache(struct vm_area_struct *vma, unsigned long address, 105void __update_cache(struct vm_area_struct *vma, unsigned long address,
92 pte_t pte) 106 pte_t pte)
93{ 107{
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 11a916629d3b..4c72e650f9b6 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -177,8 +177,8 @@ extern void check_bus_watcher(void);
177 177
178asmlinkage void sb1_cache_error(void) 178asmlinkage void sb1_cache_error(void)
179{ 179{
180 uint64_t cerr_dpa;
181 uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res; 180 uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res;
181 unsigned long long cerr_dpa;
182 182
183#ifdef CONFIG_SIBYTE_BW_TRACE 183#ifdef CONFIG_SIBYTE_BW_TRACE
184 /* Freeze the trace buffer now */ 184 /* Freeze the trace buffer now */
@@ -329,8 +329,9 @@ static uint32_t extract_ic(unsigned short addr, int data)
329{ 329{
330 unsigned short way; 330 unsigned short way;
331 int valid; 331 int valid;
332 uint64_t taglo, va, tlo_tmp;
333 uint32_t taghi, taglolo, taglohi; 332 uint32_t taghi, taglolo, taglohi;
333 unsigned long long taglo, va;
334 uint64_t tlo_tmp;
334 uint8_t lru; 335 uint8_t lru;
335 int res = 0; 336 int res = 0;
336 337
@@ -484,8 +485,8 @@ static uint32_t extract_dc(unsigned short addr, int data)
484{ 485{
485 int valid, way; 486 int valid, way;
486 unsigned char state; 487 unsigned char state;
487 uint64_t taglo, pa;
488 uint32_t taghi, taglolo, taglohi; 488 uint32_t taghi, taglolo, taglohi;
489 unsigned long long taglo, pa;
489 uint8_t ecc, lru; 490 uint8_t ecc, lru;
490 int res = 0; 491 int res = 0;
491 492
@@ -535,8 +536,8 @@ static uint32_t extract_dc(unsigned short addr, int data)
535 } 536 }
536 537
537 if (data) { 538 if (data) {
538 uint64_t datalo;
539 uint32_t datalohi, datalolo, datahi; 539 uint32_t datalohi, datalolo, datahi;
540 unsigned long long datalo;
540 int offset; 541 int offset;
541 char bad_ecc = 0; 542 char bad_ecc = 0;
542 543
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index f503d02e403b..f0eb29917d9a 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -19,6 +19,13 @@
19 19
20#include <dma-coherence.h> 20#include <dma-coherence.h>
21 21
22static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
23{
24 unsigned long addr = plat_dma_addr_to_phys(dma_addr);
25
26 return (unsigned long)phys_to_virt(addr);
27}
28
22/* 29/*
23 * Warning on the terminology - Linux calls an uncached area coherent; 30 * Warning on the terminology - Linux calls an uncached area coherent;
24 * MIPS terminology calls memory areas with hardware maintained coherency 31 * MIPS terminology calls memory areas with hardware maintained coherency
@@ -140,7 +147,7 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
140 enum dma_data_direction direction) 147 enum dma_data_direction direction)
141{ 148{
142 if (cpu_is_noncoherent_r10000(dev)) 149 if (cpu_is_noncoherent_r10000(dev))
143 __dma_sync(plat_dma_addr_to_phys(dma_addr) + PAGE_OFFSET, size, 150 __dma_sync(dma_addr_to_virt(dma_addr), size,
144 direction); 151 direction);
145 152
146 plat_unmap_dma_mem(dma_addr); 153 plat_unmap_dma_mem(dma_addr);
@@ -234,7 +241,7 @@ void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
234 if (cpu_is_noncoherent_r10000(dev)) { 241 if (cpu_is_noncoherent_r10000(dev)) {
235 unsigned long addr; 242 unsigned long addr;
236 243
237 addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); 244 addr = dma_addr_to_virt(dma_handle);
238 __dma_sync(addr, size, direction); 245 __dma_sync(addr, size, direction);
239 } 246 }
240} 247}
@@ -249,7 +256,7 @@ void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
249 if (!plat_device_is_coherent(dev)) { 256 if (!plat_device_is_coherent(dev)) {
250 unsigned long addr; 257 unsigned long addr;
251 258
252 addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); 259 addr = dma_addr_to_virt(dma_handle);
253 __dma_sync(addr, size, direction); 260 __dma_sync(addr, size, direction);
254 } 261 }
255} 262}
@@ -264,7 +271,7 @@ void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
264 if (cpu_is_noncoherent_r10000(dev)) { 271 if (cpu_is_noncoherent_r10000(dev)) {
265 unsigned long addr; 272 unsigned long addr;
266 273
267 addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); 274 addr = dma_addr_to_virt(dma_handle);
268 __dma_sync(addr + offset, size, direction); 275 __dma_sync(addr + offset, size, direction);
269 } 276 }
270} 277}
@@ -279,7 +286,7 @@ void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
279 if (!plat_device_is_coherent(dev)) { 286 if (!plat_device_is_coherent(dev)) {
280 unsigned long addr; 287 unsigned long addr;
281 288
282 addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); 289 addr = dma_addr_to_virt(dma_handle);
283 __dma_sync(addr + offset, size, direction); 290 __dma_sync(addr + offset, size, direction);
284 } 291 }
285} 292}
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index f08ae71c46ff..e9951c0e689f 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -123,7 +123,7 @@ static void __init kmap_coherent_init(void)
123static inline void kmap_coherent_init(void) {} 123static inline void kmap_coherent_init(void) {}
124#endif 124#endif
125 125
126static inline void *kmap_coherent(struct page *page, unsigned long addr) 126void *kmap_coherent(struct page *page, unsigned long addr)
127{ 127{
128 enum fixed_addresses idx; 128 enum fixed_addresses idx;
129 unsigned long vaddr, flags, entrylo; 129 unsigned long vaddr, flags, entrylo;
@@ -177,7 +177,7 @@ static inline void *kmap_coherent(struct page *page, unsigned long addr)
177 177
178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) 178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
179 179
180static inline void kunmap_coherent(struct page *page) 180void kunmap_coherent(struct page *page)
181{ 181{
182#ifndef CONFIG_MIPS_MT_SMTC 182#ifndef CONFIG_MIPS_MT_SMTC
183 unsigned int wired; 183 unsigned int wired;
@@ -377,7 +377,7 @@ void __init paging_init(void)
377#ifdef CONFIG_FLATMEM 377#ifdef CONFIG_FLATMEM
378 free_area_init(zones_size); 378 free_area_init(zones_size);
379#else 379#else
380 pfn = 0; 380 pfn = min_low_pfn;
381 for (i = 0; i < MAX_NR_ZONES; i++) 381 for (i = 0; i < MAX_NR_ZONES; i++)
382 for (j = 0; j < zones_size[i]; j++, pfn++) 382 for (j = 0; j < zones_size[i]; j++, pfn++)
383 if (!page_is_ram(pfn)) 383 if (!page_is_ram(pfn))
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index fc3c7878fb45..adb37d0a30ea 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -218,8 +218,7 @@ void sb1_dma_init(void)
218 for (i = 0; i < DM_NUM_CHANNELS; i++) { 218 for (i = 0; i < DM_NUM_CHANNELS; i++) {
219 const u64 base_val = CPHYSADDR(&page_descr[i]) | 219 const u64 base_val = CPHYSADDR(&page_descr[i]) |
220 V_DM_DSCR_BASE_RINGSZ(1); 220 V_DM_DSCR_BASE_RINGSZ(1);
221 volatile void *base_reg = 221 void *base_reg = IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
222 IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
223 222
224 __raw_writeq(base_val, base_reg); 223 __raw_writeq(base_val, base_reg);
225 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); 224 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);