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-rw-r--r--arch/mips/mm/c-r3k.c1
-rw-r--r--arch/mips/mm/c-r4k.c18
-rw-r--r--arch/mips/mm/c-tx39.c2
-rw-r--r--arch/mips/mm/cache.c1
-rw-r--r--arch/mips/mm/tlbex.c6
5 files changed, 19 insertions, 9 deletions
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 27a5b466c85c..5500c20c79ae 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -320,6 +320,7 @@ void __cpuinit r3k_cache_init(void)
320 flush_cache_range = r3k_flush_cache_range; 320 flush_cache_range = r3k_flush_cache_range;
321 flush_cache_page = r3k_flush_cache_page; 321 flush_cache_page = r3k_flush_cache_page;
322 flush_icache_range = r3k_flush_icache_range; 322 flush_icache_range = r3k_flush_icache_range;
323 local_flush_icache_range = r3k_flush_icache_range;
323 324
324 flush_cache_sigtramp = r3k_flush_cache_sigtramp; 325 flush_cache_sigtramp = r3k_flush_cache_sigtramp;
325 local_flush_data_cache_page = local_r3k_flush_data_cache_page; 326 local_flush_data_cache_page = local_r3k_flush_data_cache_page;
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 71df3390c07b..6e99665ae860 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -543,12 +543,8 @@ struct flush_icache_range_args {
543 unsigned long end; 543 unsigned long end;
544}; 544};
545 545
546static inline void local_r4k_flush_icache_range(void *args) 546static inline void local_r4k_flush_icache_range(unsigned long start, unsigned long end)
547{ 547{
548 struct flush_icache_range_args *fir_args = args;
549 unsigned long start = fir_args->start;
550 unsigned long end = fir_args->end;
551
552 if (!cpu_has_ic_fills_f_dc) { 548 if (!cpu_has_ic_fills_f_dc) {
553 if (end - start >= dcache_size) { 549 if (end - start >= dcache_size) {
554 r4k_blast_dcache(); 550 r4k_blast_dcache();
@@ -564,6 +560,15 @@ static inline void local_r4k_flush_icache_range(void *args)
564 protected_blast_icache_range(start, end); 560 protected_blast_icache_range(start, end);
565} 561}
566 562
563static inline void local_r4k_flush_icache_range_ipi(void *args)
564{
565 struct flush_icache_range_args *fir_args = args;
566 unsigned long start = fir_args->start;
567 unsigned long end = fir_args->end;
568
569 local_r4k_flush_icache_range(start, end);
570}
571
567static void r4k_flush_icache_range(unsigned long start, unsigned long end) 572static void r4k_flush_icache_range(unsigned long start, unsigned long end)
568{ 573{
569 struct flush_icache_range_args args; 574 struct flush_icache_range_args args;
@@ -571,7 +576,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
571 args.start = start; 576 args.start = start;
572 args.end = end; 577 args.end = end;
573 578
574 r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1); 579 r4k_on_each_cpu(local_r4k_flush_icache_range_ipi, &args, 1);
575 instruction_hazard(); 580 instruction_hazard();
576} 581}
577 582
@@ -1375,6 +1380,7 @@ void __cpuinit r4k_cache_init(void)
1375 local_flush_data_cache_page = local_r4k_flush_data_cache_page; 1380 local_flush_data_cache_page = local_r4k_flush_data_cache_page;
1376 flush_data_cache_page = r4k_flush_data_cache_page; 1381 flush_data_cache_page = r4k_flush_data_cache_page;
1377 flush_icache_range = r4k_flush_icache_range; 1382 flush_icache_range = r4k_flush_icache_range;
1383 local_flush_icache_range = local_r4k_flush_icache_range;
1378 1384
1379#if defined(CONFIG_DMA_NONCOHERENT) 1385#if defined(CONFIG_DMA_NONCOHERENT)
1380 if (coherentio) { 1386 if (coherentio) {
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index a9f7f1f5e9b4..f7c8f9ce39c1 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -362,6 +362,7 @@ void __cpuinit tx39_cache_init(void)
362 flush_cache_range = (void *) tx39h_flush_icache_all; 362 flush_cache_range = (void *) tx39h_flush_icache_all;
363 flush_cache_page = (void *) tx39h_flush_icache_all; 363 flush_cache_page = (void *) tx39h_flush_icache_all;
364 flush_icache_range = (void *) tx39h_flush_icache_all; 364 flush_icache_range = (void *) tx39h_flush_icache_all;
365 local_flush_icache_range = (void *) tx39h_flush_icache_all;
365 366
366 flush_cache_sigtramp = (void *) tx39h_flush_icache_all; 367 flush_cache_sigtramp = (void *) tx39h_flush_icache_all;
367 local_flush_data_cache_page = (void *) tx39h_flush_icache_all; 368 local_flush_data_cache_page = (void *) tx39h_flush_icache_all;
@@ -390,6 +391,7 @@ void __cpuinit tx39_cache_init(void)
390 flush_cache_range = tx39_flush_cache_range; 391 flush_cache_range = tx39_flush_cache_range;
391 flush_cache_page = tx39_flush_cache_page; 392 flush_cache_page = tx39_flush_cache_page;
392 flush_icache_range = tx39_flush_icache_range; 393 flush_icache_range = tx39_flush_icache_range;
394 local_flush_icache_range = tx39_flush_icache_range;
393 395
394 flush_cache_sigtramp = tx39_flush_cache_sigtramp; 396 flush_cache_sigtramp = tx39_flush_cache_sigtramp;
395 local_flush_data_cache_page = local_tx39_flush_data_cache_page; 397 local_flush_data_cache_page = local_tx39_flush_data_cache_page;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 034e8506f6ea..1eb7c71e3d6a 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -29,6 +29,7 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, 29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
30 unsigned long pfn); 30 unsigned long pfn);
31void (*flush_icache_range)(unsigned long start, unsigned long end); 31void (*flush_icache_range)(unsigned long start, unsigned long end);
32void (*local_flush_icache_range)(unsigned long start, unsigned long end);
32 33
33void (*__flush_cache_vmap)(void); 34void (*__flush_cache_vmap)(void);
34void (*__flush_cache_vunmap)(void); 35void (*__flush_cache_vunmap)(void);
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 76da73a5ab3c..979cf9197282 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1273,10 +1273,10 @@ void __cpuinit build_tlb_refill_handler(void)
1273 1273
1274void __cpuinit flush_tlb_handlers(void) 1274void __cpuinit flush_tlb_handlers(void)
1275{ 1275{
1276 flush_icache_range((unsigned long)handle_tlbl, 1276 local_flush_icache_range((unsigned long)handle_tlbl,
1277 (unsigned long)handle_tlbl + sizeof(handle_tlbl)); 1277 (unsigned long)handle_tlbl + sizeof(handle_tlbl));
1278 flush_icache_range((unsigned long)handle_tlbs, 1278 local_flush_icache_range((unsigned long)handle_tlbs,
1279 (unsigned long)handle_tlbs + sizeof(handle_tlbs)); 1279 (unsigned long)handle_tlbs + sizeof(handle_tlbs));
1280 flush_icache_range((unsigned long)handle_tlbm, 1280 local_flush_icache_range((unsigned long)handle_tlbm,
1281 (unsigned long)handle_tlbm + sizeof(handle_tlbm)); 1281 (unsigned long)handle_tlbm + sizeof(handle_tlbm));
1282} 1282}