6 files changed, 15 insertions, 35 deletions

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b26a690..58d9075e86fe 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
                 c->dcache.ways = 2;
                 c->dcache.waybit = 0;
 
-                c->options |= MIPS_CPU_CACHE_CDEX_P;
+                c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
                 break;
 
         case CPU_TX49XX:
@@ -1026,13 +1026,7 @@ static void __cpuinit probe_pcache(void)
                 c->icache.flags |= MIPS_CACHE_VTAG;
                 break;
 
-        case CPU_AU1000:
-        case CPU_AU1500:
-        case CPU_AU1100:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
+        case CPU_ALCHEMY:
                 c->icache.flags |= MIPS_CACHE_IC_F_DC;
                 break;
         }
@@ -1244,7 +1238,7 @@ void au1x00_fixup_config_od(void)
         /*
          * Au1100 errata actually keeps silence about this bit, so we set it
          * just in case for those revisions that require it to be set according
-         * to arch/mips/au1000/common/cputable.c
+         * to the (now gone) cpu table.
          */
         case 0x02030200: /* Au1100 AB */
         case 0x02030201: /* Au1100 BA */
@@ -1314,11 +1308,10 @@ static void __cpuinit coherency_setup(void)
                 break;
         /*
          * We need to catch the early Alchemy SOCs with
-         * the write-only co_config.od bit and set it back to one...
+         * the write-only co_config.od bit and set it back to one on:
+         * Au1000 rev DA, HA, HB;  Au1100 AB, BA, BC, Au1500 AB
          */
-        case CPU_AU1000: /* rev. DA, HA, HB */
-        case CPU_AU1100: /* rev. AB, BA, BC ?? */
-        case CPU_AU1500: /* rev. AB */
+        case CPU_ALCHEMY:
                 au1x00_fixup_config_od();
                 break;
 
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 546e6977d4ff..bed56f1ac837 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -225,7 +225,7 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
         if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
                 unsigned long addr;
 
-                addr = plat_dma_addr_to_phys(dma_address);
+                addr = dma_addr_to_virt(dma_address);
                 dma_cache_wback_inv(addr, size);
         }
 
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 8f2cd8eda741..060d28dca8a8 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -17,8 +17,7 @@ void *__kmap(struct page *page)
 
 void __kunmap(struct page *page)
 {
-        if (in_interrupt())
-                BUG();
+        BUG_ON(in_interrupt());
         if (!PageHighMem(page))
                 return;
         kunmap_high(page);
@@ -46,8 +45,7 @@ void *__kmap_atomic(struct page *page, enum km_type type)
         idx = type + KM_TYPE_NR*smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-        if (!pte_none(*(kmap_pte-idx)))
-                BUG();
+        BUG_ON(!pte_none(*(kmap_pte - idx)));
 #endif
         set_pte(kmap_pte-idx, mk_pte(page, kmap_prot));
         local_flush_tlb_one((unsigned long)vaddr);
@@ -66,8 +64,7 @@ void __kunmap_atomic(void *kvaddr, enum km_type type)
                 return;
         }
 
-        if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN+idx))
-                BUG();
+        BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
 
         /*
          * force other mappings to Oops if they'll try to access
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 137c14bafd6b..d9348946a19e 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -307,8 +307,7 @@ void __init fixrange_init(unsigned long start, unsigned long end,
                                 if (pmd_none(*pmd)) {
                                         pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
                                         set_pmd(pmd, __pmd((unsigned long)pte));
-                                        if (pte != pte_offset_kernel(pmd, 0))
-                                                BUG();
+                                        BUG_ON(pte != pte_offset_kernel(pmd, 0));
                                 }
                                 vaddr += PMD_SIZE;
                         }
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index 59945b9ee23c..0c43248347bd 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -27,8 +27,7 @@ static inline void remap_area_pte(pte_t * pte, unsigned long address,
         end = address + size;
         if (end > PMD_SIZE)
                 end = PMD_SIZE;
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         pfn = phys_addr >> PAGE_SHIFT;
         do {
                 if (!pte_none(*pte)) {
@@ -52,8 +51,7 @@ static inline int remap_area_pmd(pmd_t * pmd, unsigned long address,
         if (end > PGDIR_SIZE)
                 end = PGDIR_SIZE;
         phys_addr -= address;
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         do {
                 pte_t * pte = pte_alloc_kernel(pmd, address);
                 if (!pte)
@@ -75,8 +73,7 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
         phys_addr -= address;
         dir = pgd_offset(&init_mm, address);
         flush_cache_all();
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         do {
                 pud_t *pud;
                 pmd_t *pmd;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index f335cf6cdd78..0615b62efd6d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -292,13 +292,6 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_R4300:
         case CPU_5KC:
         case CPU_TX49XX:
-        case CPU_AU1000:
-        case CPU_AU1100:
-        case CPU_AU1500:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
         case CPU_PR4450:
                 uasm_i_nop(p);
                 tlbw(p);
@@ -321,6 +314,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_R5500:
                 if (m4kc_tlbp_war())
                         uasm_i_nop(p);
+        case CPU_ALCHEMY:
                 tlbw(p);
                 break;