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-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/tlbex.c22
-rw-r--r--arch/mips/mm/uasm.c23
3 files changed, 37 insertions, 10 deletions
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index be8627bc5b02..12af739048fa 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -133,7 +133,7 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
133} 133}
134 134
135unsigned long _page_cachable_default; 135unsigned long _page_cachable_default;
136EXPORT_SYMBOL_GPL(_page_cachable_default); 136EXPORT_SYMBOL(_page_cachable_default);
137 137
138static inline void setup_protection_map(void) 138static inline void setup_protection_map(void)
139{ 139{
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0de0e4127d66..d1f68aadbc4c 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -788,10 +788,15 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
788 * create the plain linear handler 788 * create the plain linear handler
789 */ 789 */
790 if (bcm1250_m3_war()) { 790 if (bcm1250_m3_war()) {
791 UASM_i_MFC0(&p, K0, C0_BADVADDR); 791 unsigned int segbits = 44;
792 UASM_i_MFC0(&p, K1, C0_ENTRYHI); 792
793 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
794 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
793 uasm_i_xor(&p, K0, K0, K1); 795 uasm_i_xor(&p, K0, K0, K1);
794 UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 796 uasm_i_dsrl32(&p, K1, K0, 62 - 32);
797 uasm_i_dsrl(&p, K0, K0, 12 + 1);
798 uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
799 uasm_i_or(&p, K0, K0, K1);
795 uasm_il_bnez(&p, &r, K0, label_leave); 800 uasm_il_bnez(&p, &r, K0, label_leave);
796 /* No need for uasm_i_nop */ 801 /* No need for uasm_i_nop */
797 } 802 }
@@ -1312,10 +1317,15 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1312 memset(relocs, 0, sizeof(relocs)); 1317 memset(relocs, 0, sizeof(relocs));
1313 1318
1314 if (bcm1250_m3_war()) { 1319 if (bcm1250_m3_war()) {
1315 UASM_i_MFC0(&p, K0, C0_BADVADDR); 1320 unsigned int segbits = 44;
1316 UASM_i_MFC0(&p, K1, C0_ENTRYHI); 1321
1322 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
1323 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
1317 uasm_i_xor(&p, K0, K0, K1); 1324 uasm_i_xor(&p, K0, K0, K1);
1318 UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 1325 uasm_i_dsrl32(&p, K1, K0, 62 - 32);
1326 uasm_i_dsrl(&p, K0, K0, 12 + 1);
1327 uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
1328 uasm_i_or(&p, K0, K0, K1);
1319 uasm_il_bnez(&p, &r, K0, label_leave); 1329 uasm_il_bnez(&p, &r, K0, label_leave);
1320 /* No need for uasm_i_nop */ 1330 /* No need for uasm_i_nop */
1321 } 1331 }
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 1581e9852461..611d564fdcf1 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -31,7 +31,8 @@ enum fields {
31 BIMM = 0x040, 31 BIMM = 0x040,
32 JIMM = 0x080, 32 JIMM = 0x080,
33 FUNC = 0x100, 33 FUNC = 0x100,
34 SET = 0x200 34 SET = 0x200,
35 SCIMM = 0x400
35}; 36};
36 37
37#define OP_MASK 0x3f 38#define OP_MASK 0x3f
@@ -52,6 +53,8 @@ enum fields {
52#define FUNC_SH 0 53#define FUNC_SH 0
53#define SET_MASK 0x7 54#define SET_MASK 0x7
54#define SET_SH 0 55#define SET_SH 0
56#define SCIMM_MASK 0xfffff
57#define SCIMM_SH 6
55 58
56enum opcode { 59enum opcode {
57 insn_invalid, 60 insn_invalid,
@@ -61,10 +64,10 @@ enum opcode {
61 insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, 64 insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
62 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, 65 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,
63 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, 66 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
64 insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, 67 insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
65 insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, 68 insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
66 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, 69 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
67 insn_dins 70 insn_dins, insn_syscall
68}; 71};
69 72
70struct insn { 73struct insn {
@@ -117,6 +120,7 @@ static struct insn insn_table[] __cpuinitdata = {
117 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 120 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
118 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 121 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
119 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 122 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
123 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
120 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 124 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
121 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 125 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
122 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, 126 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
@@ -136,6 +140,7 @@ static struct insn insn_table[] __cpuinitdata = {
136 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, 140 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
137 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 141 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
138 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, 142 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
143 { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
139 { insn_invalid, 0, 0 } 144 { insn_invalid, 0, 0 }
140}; 145};
141 146
@@ -208,6 +213,14 @@ static inline __cpuinit u32 build_jimm(u32 arg)
208 return (arg >> 2) & JIMM_MASK; 213 return (arg >> 2) & JIMM_MASK;
209} 214}
210 215
216static inline __cpuinit u32 build_scimm(u32 arg)
217{
218 if (arg & ~SCIMM_MASK)
219 printk(KERN_WARNING "Micro-assembler field overflow\n");
220
221 return (arg & SCIMM_MASK) << SCIMM_SH;
222}
223
211static inline __cpuinit u32 build_func(u32 arg) 224static inline __cpuinit u32 build_func(u32 arg)
212{ 225{
213 if (arg & ~FUNC_MASK) 226 if (arg & ~FUNC_MASK)
@@ -266,6 +279,8 @@ static void __cpuinit build_insn(u32 **buf, enum opcode opc, ...)
266 op |= build_func(va_arg(ap, u32)); 279 op |= build_func(va_arg(ap, u32));
267 if (ip->fields & SET) 280 if (ip->fields & SET)
268 op |= build_set(va_arg(ap, u32)); 281 op |= build_set(va_arg(ap, u32));
282 if (ip->fields & SCIMM)
283 op |= build_scimm(va_arg(ap, u32));
269 va_end(ap); 284 va_end(ap);
270 285
271 **buf = op; 286 **buf = op;
@@ -373,6 +388,7 @@ I_u2s3u1(_lw)
373I_u1u2u3(_mfc0) 388I_u1u2u3(_mfc0)
374I_u1u2u3(_mtc0) 389I_u1u2u3(_mtc0)
375I_u2u1u3(_ori) 390I_u2u1u3(_ori)
391I_u3u1u2(_or)
376I_u2s3u1(_pref) 392I_u2s3u1(_pref)
377I_0(_rfe) 393I_0(_rfe)
378I_u2s3u1(_sc) 394I_u2s3u1(_sc)
@@ -391,6 +407,7 @@ I_0(_tlbwr)
391I_u3u1u2(_xor) 407I_u3u1u2(_xor)
392I_u2u1u3(_xori) 408I_u2u1u3(_xori)
393I_u2u1msbu3(_dins); 409I_u2u1msbu3(_dins);
410I_u1(_syscall);
394 411
395/* Handle labels. */ 412/* Handle labels. */
396void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) 413void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid)