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-rw-r--r--arch/mips/mm/Makefile4
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/mm/init.c8
-rw-r--r--arch/mips/mm/pg-sb1.c8
-rw-r--r--arch/mips/mm/tlbex.c30
5 files changed, 27 insertions, 27 deletions
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index f61e038b4440..b56a0abdc3d4 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -5,8 +5,8 @@
5obj-y += cache.o extable.o fault.o init.o pgtable.o \ 5obj-y += cache.o extable.o fault.o init.o pgtable.o \
6 tlbex.o tlbex-fault.o 6 tlbex.o tlbex-fault.o
7 7
8obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o 8obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o
9obj-$(CONFIG_MIPS64) += pgtable-64.o 9obj-$(CONFIG_64BIT) += pgtable-64.o
10obj-$(CONFIG_HIGHMEM) += highmem.o 10obj-$(CONFIG_HIGHMEM) += highmem.o
11 11
12obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 12obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index a03ebb2cba67..20d40725e5bb 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -723,10 +723,10 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
723 ".set push\n\t" 723 ".set push\n\t"
724 ".set noat\n\t" 724 ".set noat\n\t"
725 ".set mips3\n\t" 725 ".set mips3\n\t"
726#ifdef CONFIG_MIPS32 726#ifdef CONFIG_32BIT
727 "la $at,1f\n\t" 727 "la $at,1f\n\t"
728#endif 728#endif
729#ifdef CONFIG_MIPS64 729#ifdef CONFIG_64BIT
730 "dla $at,1f\n\t" 730 "dla $at,1f\n\t"
731#endif 731#endif
732 "cache %0,($at)\n\t" 732 "cache %0,($at)\n\t"
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 9c9a271c8a3a..dc6830b10fab 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -96,7 +96,7 @@ static void __init kmap_init(void)
96 kmap_prot = PAGE_KERNEL; 96 kmap_prot = PAGE_KERNEL;
97} 97}
98 98
99#ifdef CONFIG_MIPS64 99#ifdef CONFIG_64BIT
100static void __init fixrange_init(unsigned long start, unsigned long end, 100static void __init fixrange_init(unsigned long start, unsigned long end,
101 pgd_t *pgd_base) 101 pgd_t *pgd_base)
102{ 102{
@@ -125,7 +125,7 @@ static void __init fixrange_init(unsigned long start, unsigned long end,
125 j = 0; 125 j = 0;
126 } 126 }
127} 127}
128#endif /* CONFIG_MIPS64 */ 128#endif /* CONFIG_64BIT */
129#endif /* CONFIG_HIGHMEM */ 129#endif /* CONFIG_HIGHMEM */
130 130
131#ifndef CONFIG_NEED_MULTIPLE_NODES 131#ifndef CONFIG_NEED_MULTIPLE_NODES
@@ -258,7 +258,7 @@ void __init mem_init(void)
258#ifdef CONFIG_BLK_DEV_INITRD 258#ifdef CONFIG_BLK_DEV_INITRD
259void free_initrd_mem(unsigned long start, unsigned long end) 259void free_initrd_mem(unsigned long start, unsigned long end)
260{ 260{
261#ifdef CONFIG_MIPS64 261#ifdef CONFIG_64BIT
262 /* Switch from KSEG0 to XKPHYS addresses */ 262 /* Switch from KSEG0 to XKPHYS addresses */
263 start = (unsigned long)phys_to_virt(CPHYSADDR(start)); 263 start = (unsigned long)phys_to_virt(CPHYSADDR(start));
264 end = (unsigned long)phys_to_virt(CPHYSADDR(end)); 264 end = (unsigned long)phys_to_virt(CPHYSADDR(end));
@@ -286,7 +286,7 @@ void free_initmem(void)
286 286
287 addr = (unsigned long) &__init_begin; 287 addr = (unsigned long) &__init_begin;
288 while (addr < (unsigned long) &__init_end) { 288 while (addr < (unsigned long) &__init_end) {
289#ifdef CONFIG_MIPS64 289#ifdef CONFIG_64BIT
290 page = PAGE_OFFSET | CPHYSADDR(addr); 290 page = PAGE_OFFSET | CPHYSADDR(addr);
291#else 291#else
292 page = addr; 292 page = addr;
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 59d131b5e536..b63e1ca350f5 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -114,7 +114,7 @@ static inline void copy_page_cpu(void *to, void *from)
114 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n" 114 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n"
115 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n" 115 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n"
116 "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n" 116 "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n"
117# ifdef CONFIG_MIPS64 117# ifdef CONFIG_64BIT
118 " ld $8, -128(%0) \n" /* Block copy a cacheline */ 118 " ld $8, -128(%0) \n" /* Block copy a cacheline */
119 " ld $9, -120(%0) \n" 119 " ld $9, -120(%0) \n"
120 " ld $10, -112(%0) \n" 120 " ld $10, -112(%0) \n"
@@ -148,7 +148,7 @@ static inline void copy_page_cpu(void *to, void *from)
148 " daddiu %0, %0, -128 \n" 148 " daddiu %0, %0, -128 \n"
149 " daddiu %1, %1, -128 \n" 149 " daddiu %1, %1, -128 \n"
150#endif 150#endif
151#ifdef CONFIG_MIPS64 151#ifdef CONFIG_64BIT
152 " ld $8, 0(%0) \n" /* Block copy a cacheline */ 152 " ld $8, 0(%0) \n" /* Block copy a cacheline */
153 "1: ld $9, 8(%0) \n" 153 "1: ld $9, 8(%0) \n"
154 " ld $10, 16(%0) \n" 154 " ld $10, 16(%0) \n"
@@ -178,7 +178,7 @@ static inline void copy_page_cpu(void *to, void *from)
178 " daddiu %0, %0, 32 \n" 178 " daddiu %0, %0, 32 \n"
179 " daddiu %1, %1, 32 \n" 179 " daddiu %1, %1, 32 \n"
180 " bnel %0, %2, 1b \n" 180 " bnel %0, %2, 1b \n"
181#ifdef CONFIG_MIPS64 181#ifdef CONFIG_64BIT
182 " ld $8, 0(%0) \n" 182 " ld $8, 0(%0) \n"
183#else 183#else
184 " lw $2, 0(%0) \n" 184 " lw $2, 0(%0) \n"
@@ -186,7 +186,7 @@ static inline void copy_page_cpu(void *to, void *from)
186 " .set pop \n" 186 " .set pop \n"
187 : "+r" (src), "+r" (dst) 187 : "+r" (src), "+r" (dst)
188 : "r" (end) 188 : "r" (end)
189#ifdef CONFIG_MIPS64 189#ifdef CONFIG_64BIT
190 : "$8","$9","$10","$11","memory"); 190 : "$8","$9","$10","$11","memory");
191#else 191#else
192 : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); 192 : "$2","$3","$6","$7","$8","$9","$10","$11","memory");
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 87e229f4d3d5..592377fa694d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -448,7 +448,7 @@ L_LA(_r3000_write_probe_fail)
448L_LA(_r3000_write_probe_ok) 448L_LA(_r3000_write_probe_ok)
449 449
450/* convenience macros for instructions */ 450/* convenience macros for instructions */
451#ifdef CONFIG_MIPS64 451#ifdef CONFIG_64BIT
452# define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off) 452# define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off)
453# define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off) 453# define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off)
454# define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh) 454# define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh)
@@ -486,7 +486,7 @@ L_LA(_r3000_write_probe_ok)
486#define i_ssnop(buf) i_sll(buf, 0, 0, 1) 486#define i_ssnop(buf) i_sll(buf, 0, 0, 1)
487#define i_ehb(buf) i_sll(buf, 0, 0, 3) 487#define i_ehb(buf) i_sll(buf, 0, 0, 3)
488 488
489#ifdef CONFIG_MIPS64 489#ifdef CONFIG_64BIT
490static __init int __attribute__((unused)) in_compat_space_p(long addr) 490static __init int __attribute__((unused)) in_compat_space_p(long addr)
491{ 491{
492 /* Is this address in 32bit compat space? */ 492 /* Is this address in 32bit compat space? */
@@ -516,7 +516,7 @@ static __init int rel_lo(long val)
516 516
517static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) 517static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
518{ 518{
519#if CONFIG_MIPS64 519#if CONFIG_64BIT
520 if (!in_compat_space_p(addr)) { 520 if (!in_compat_space_p(addr)) {
521 i_lui(buf, rs, rel_highest(addr)); 521 i_lui(buf, rs, rel_highest(addr));
522 if (rel_higher(addr)) 522 if (rel_higher(addr))
@@ -682,7 +682,7 @@ static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
682#define C0_EPC 14 682#define C0_EPC 14
683#define C0_XCONTEXT 20 683#define C0_XCONTEXT 20
684 684
685#ifdef CONFIG_MIPS64 685#ifdef CONFIG_64BIT
686# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT) 686# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT)
687#else 687#else
688# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT) 688# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT)
@@ -923,7 +923,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
923 } 923 }
924} 924}
925 925
926#ifdef CONFIG_MIPS64 926#ifdef CONFIG_64BIT
927/* 927/*
928 * TMP and PTR are scratch. 928 * TMP and PTR are scratch.
929 * TMP will be clobbered, PTR will hold the pmd entry. 929 * TMP will be clobbered, PTR will hold the pmd entry.
@@ -1010,7 +1010,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1010 } 1010 }
1011} 1011}
1012 1012
1013#else /* !CONFIG_MIPS64 */ 1013#else /* !CONFIG_64BIT */
1014 1014
1015/* 1015/*
1016 * TMP and PTR are scratch. 1016 * TMP and PTR are scratch.
@@ -1038,7 +1038,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1038 i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ 1038 i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
1039} 1039}
1040 1040
1041#endif /* !CONFIG_MIPS64 */ 1041#endif /* !CONFIG_64BIT */
1042 1042
1043static __init void build_adjust_context(u32 **p, unsigned int ctx) 1043static __init void build_adjust_context(u32 **p, unsigned int ctx)
1044{ 1044{
@@ -1159,7 +1159,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1159 /* No need for i_nop */ 1159 /* No need for i_nop */
1160 } 1160 }
1161 1161
1162#ifdef CONFIG_MIPS64 1162#ifdef CONFIG_64BIT
1163 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ 1163 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
1164#else 1164#else
1165 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ 1165 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
@@ -1171,7 +1171,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1171 l_leave(&l, p); 1171 l_leave(&l, p);
1172 i_eret(&p); /* return from trap */ 1172 i_eret(&p); /* return from trap */
1173 1173
1174#ifdef CONFIG_MIPS64 1174#ifdef CONFIG_64BIT
1175 build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); 1175 build_get_pgd_vmalloc64(&p, &l, &r, K0, K1);
1176#endif 1176#endif
1177 1177
@@ -1182,7 +1182,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1182 * need three, with the the second nop'ed and the third being 1182 * need three, with the the second nop'ed and the third being
1183 * unused. 1183 * unused.
1184 */ 1184 */
1185#ifdef CONFIG_MIPS32 1185#ifdef CONFIG_32BIT
1186 if ((p - tlb_handler) > 64) 1186 if ((p - tlb_handler) > 64)
1187 panic("TLB refill handler space exceeded"); 1187 panic("TLB refill handler space exceeded");
1188#else 1188#else
@@ -1195,12 +1195,12 @@ static void __init build_r4000_tlb_refill_handler(void)
1195 /* 1195 /*
1196 * Now fold the handler in the TLB refill handler space. 1196 * Now fold the handler in the TLB refill handler space.
1197 */ 1197 */
1198#ifdef CONFIG_MIPS32 1198#ifdef CONFIG_32BIT
1199 f = final_handler; 1199 f = final_handler;
1200 /* Simplest case, just copy the handler. */ 1200 /* Simplest case, just copy the handler. */
1201 copy_handler(relocs, labels, tlb_handler, p, f); 1201 copy_handler(relocs, labels, tlb_handler, p, f);
1202 final_len = p - tlb_handler; 1202 final_len = p - tlb_handler;
1203#else /* CONFIG_MIPS64 */ 1203#else /* CONFIG_64BIT */
1204 f = final_handler + 32; 1204 f = final_handler + 32;
1205 if ((p - tlb_handler) <= 32) { 1205 if ((p - tlb_handler) <= 32) {
1206 /* Just copy the handler. */ 1206 /* Just copy the handler. */
@@ -1235,7 +1235,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1235 copy_handler(relocs, labels, split, p, final_handler); 1235 copy_handler(relocs, labels, split, p, final_handler);
1236 final_len = (f - (final_handler + 32)) + (p - split); 1236 final_len = (f - (final_handler + 32)) + (p - split);
1237 } 1237 }
1238#endif /* CONFIG_MIPS64 */ 1238#endif /* CONFIG_64BIT */
1239 1239
1240 resolve_relocs(relocs, labels); 1240 resolve_relocs(relocs, labels);
1241 printk("Synthesized TLB refill handler (%u instructions).\n", 1241 printk("Synthesized TLB refill handler (%u instructions).\n",
@@ -1605,7 +1605,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct label **l,
1605 struct reloc **r, unsigned int pte, 1605 struct reloc **r, unsigned int pte,
1606 unsigned int ptr) 1606 unsigned int ptr)
1607{ 1607{
1608#ifdef CONFIG_MIPS64 1608#ifdef CONFIG_64BIT
1609 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ 1609 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */
1610#else 1610#else
1611 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ 1611 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
@@ -1636,7 +1636,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct label **l,
1636 l_leave(l, *p); 1636 l_leave(l, *p);
1637 i_eret(p); /* return from trap */ 1637 i_eret(p); /* return from trap */
1638 1638
1639#ifdef CONFIG_MIPS64 1639#ifdef CONFIG_64BIT
1640 build_get_pgd_vmalloc64(p, l, r, tmp, ptr); 1640 build_get_pgd_vmalloc64(p, l, r, tmp, ptr);
1641#endif 1641#endif
1642} 1642}