diff options
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 22 | ||||
| -rw-r--r-- | arch/mips/mm/fault.c | 21 |
2 files changed, 27 insertions, 16 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 6e99665ae860..c43f4b26a690 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
| @@ -618,15 +618,35 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) | |||
| 618 | if (cpu_has_inclusive_pcaches) { | 618 | if (cpu_has_inclusive_pcaches) { |
| 619 | if (size >= scache_size) | 619 | if (size >= scache_size) |
| 620 | r4k_blast_scache(); | 620 | r4k_blast_scache(); |
| 621 | else | 621 | else { |
| 622 | unsigned long lsize = cpu_scache_line_size(); | ||
| 623 | unsigned long almask = ~(lsize - 1); | ||
| 624 | |||
| 625 | /* | ||
| 626 | * There is no clearly documented alignment requirement | ||
| 627 | * for the cache instruction on MIPS processors and | ||
| 628 | * some processors, among them the RM5200 and RM7000 | ||
| 629 | * QED processors will throw an address error for cache | ||
| 630 | * hit ops with insufficient alignment. Solved by | ||
| 631 | * aligning the address to cache line size. | ||
| 632 | */ | ||
| 633 | cache_op(Hit_Writeback_Inv_SD, addr & almask); | ||
| 634 | cache_op(Hit_Writeback_Inv_SD, | ||
| 635 | (addr + size - 1) & almask); | ||
| 622 | blast_inv_scache_range(addr, addr + size); | 636 | blast_inv_scache_range(addr, addr + size); |
| 637 | } | ||
| 623 | return; | 638 | return; |
| 624 | } | 639 | } |
| 625 | 640 | ||
| 626 | if (cpu_has_safe_index_cacheops && size >= dcache_size) { | 641 | if (cpu_has_safe_index_cacheops && size >= dcache_size) { |
| 627 | r4k_blast_dcache(); | 642 | r4k_blast_dcache(); |
| 628 | } else { | 643 | } else { |
| 644 | unsigned long lsize = cpu_dcache_line_size(); | ||
| 645 | unsigned long almask = ~(lsize - 1); | ||
| 646 | |||
| 629 | R4600_HIT_CACHEOP_WAR_IMPL; | 647 | R4600_HIT_CACHEOP_WAR_IMPL; |
| 648 | cache_op(Hit_Writeback_Inv_D, addr & almask); | ||
| 649 | cache_op(Hit_Writeback_Inv_D, (addr + size - 1) & almask); | ||
| 630 | blast_inv_dcache_range(addr, addr + size); | 650 | blast_inv_dcache_range(addr, addr + size); |
| 631 | } | 651 | } |
| 632 | 652 | ||
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index fa636fc6b7b9..55767ad9f00e 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c | |||
| @@ -97,7 +97,6 @@ good_area: | |||
| 97 | goto bad_area; | 97 | goto bad_area; |
| 98 | } | 98 | } |
| 99 | 99 | ||
| 100 | survive: | ||
| 101 | /* | 100 | /* |
| 102 | * If for any reason at all we couldn't handle the fault, | 101 | * If for any reason at all we couldn't handle the fault, |
| 103 | * make sure we exit gracefully rather than endlessly redo | 102 | * make sure we exit gracefully rather than endlessly redo |
| @@ -167,21 +166,13 @@ no_context: | |||
| 167 | field, regs->regs[31]); | 166 | field, regs->regs[31]); |
| 168 | die("Oops", regs); | 167 | die("Oops", regs); |
| 169 | 168 | ||
| 170 | /* | ||
| 171 | * We ran out of memory, or some other thing happened to us that made | ||
| 172 | * us unable to handle the page fault gracefully. | ||
| 173 | */ | ||
| 174 | out_of_memory: | 169 | out_of_memory: |
| 175 | up_read(&mm->mmap_sem); | 170 | /* |
| 176 | if (is_global_init(tsk)) { | 171 | * We ran out of memory, call the OOM killer, and return the userspace |
| 177 | yield(); | 172 | * (which will retry the fault, or kill us if we got oom-killed). |
| 178 | down_read(&mm->mmap_sem); | 173 | */ |
| 179 | goto survive; | 174 | pagefault_out_of_memory(); |
| 180 | } | 175 | return; |
| 181 | printk("VM: killing process %s\n", tsk->comm); | ||
| 182 | if (user_mode(regs)) | ||
| 183 | do_group_exit(SIGKILL); | ||
| 184 | goto no_context; | ||
| 185 | 176 | ||
| 186 | do_sigbus: | 177 | do_sigbus: |
| 187 | up_read(&mm->mmap_sem); | 178 | up_read(&mm->mmap_sem); |
