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-rw-r--r--arch/mips/mm/tlb-r4k.c34
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 45b7c35950c4..21d04dfa11db 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -337,40 +337,6 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
337 EXIT_CRITICAL(flags); 337 EXIT_CRITICAL(flags);
338} 338}
339 339
340#if 0
341static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
342 unsigned long address, pte_t pte)
343{
344 unsigned long flags;
345 unsigned int asid;
346 pgd_t *pgdp;
347 pmd_t *pmdp;
348 pte_t *ptep;
349 int idx;
350
351 ENTER_CRITICAL(flags);
352 address &= (PAGE_MASK << 1);
353 asid = read_c0_entryhi() & ASID_MASK;
354 write_c0_entryhi(address | asid);
355 pgdp = pgd_offset(vma->vm_mm, address);
356 mtc0_tlbw_hazard();
357 tlb_probe();
358 tlb_probe_hazard();
359 pmdp = pmd_offset(pgdp, address);
360 idx = read_c0_index();
361 ptep = pte_offset_map(pmdp, address);
362 write_c0_entrylo0(pte_val(*ptep++) >> 6);
363 write_c0_entrylo1(pte_val(*ptep) >> 6);
364 mtc0_tlbw_hazard();
365 if (idx < 0)
366 tlb_write_random();
367 else
368 tlb_write_indexed();
369 tlbw_use_hazard();
370 EXIT_CRITICAL(flags);
371}
372#endif
373
374void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, 340void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
375 unsigned long entryhi, unsigned long pagemask) 341 unsigned long entryhi, unsigned long pagemask)
376{ 342{