1 files changed, 0 insertions, 9 deletions
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 98f530e18216..8e666c55f4d4 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -140,15 +140,6 @@ static void __cpuinit set_prefetch_parameters(void)
                        pref_bias_copy_load = 256;
                        break;
-                case CPU_RM9000:
-                        /*
-                         * As a workaround for erratum G105 which make the
-                         * PrepareForStore hint unusable we fall back to
-                         * StoreRetained on the RM9000.  Once it is known which
-                         * versions of the RM9000 we'll be able to condition-
-                         * alize this.
-                         */
                case CPU_R10000:
                case CPU_R12000:
                case CPU_R14000:

diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 98f530e18216..8e666c55f4d4 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c
@@ -140,15 +140,6 @@ static void __cpuinit set_prefetch_parameters(void)
140	pref_bias_copy_load = 256;	140	pref_bias_copy_load = 256;
141	break;	141	break;
142		142
143	case CPU_RM9000:
144	/*
145	* As a workaround for erratum G105 which make the
146	* PrepareForStore hint unusable we fall back to
147	* StoreRetained on the RM9000. Once it is known which
148	* versions of the RM9000 we'll be able to condition-
149	* alize this.
150	*/
151
152	case CPU_R10000:	143	case CPU_R10000:
153	case CPU_R12000:	144	case CPU_R12000:
154	case CPU_R14000:	145	case CPU_R14000: