aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/mm/c-r4k.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index bda8eb26ece7..5109be96d98d 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -32,7 +32,7 @@
32#include <asm/mmu_context.h> 32#include <asm/mmu_context.h>
33#include <asm/war.h> 33#include <asm/war.h>
34#include <asm/cacheflush.h> /* for run_uncached() */ 34#include <asm/cacheflush.h> /* for run_uncached() */
35 35#include <asm/traps.h>
36 36
37/* 37/*
38 * Special Variant of smp_call_function for use by cache functions: 38 * Special Variant of smp_call_function for use by cache functions:
@@ -1385,10 +1385,8 @@ static int __init setcoherentio(char *str)
1385__setup("coherentio", setcoherentio); 1385__setup("coherentio", setcoherentio);
1386#endif 1386#endif
1387 1387
1388void __cpuinit r4k_cache_init(void) 1388static void __cpuinit r4k_cache_error_setup(void)
1389{ 1389{
1390 extern void build_clear_page(void);
1391 extern void build_copy_page(void);
1392 extern char __weak except_vec2_generic; 1390 extern char __weak except_vec2_generic;
1393 extern char __weak except_vec2_sb1; 1391 extern char __weak except_vec2_sb1;
1394 struct cpuinfo_mips *c = &current_cpu_data; 1392 struct cpuinfo_mips *c = &current_cpu_data;
@@ -1403,6 +1401,13 @@ void __cpuinit r4k_cache_init(void)
1403 set_uncached_handler(0x100, &except_vec2_generic, 0x80); 1401 set_uncached_handler(0x100, &except_vec2_generic, 0x80);
1404 break; 1402 break;
1405 } 1403 }
1404}
1405
1406void __cpuinit r4k_cache_init(void)
1407{
1408 extern void build_clear_page(void);
1409 extern void build_copy_page(void);
1410 struct cpuinfo_mips *c = &current_cpu_data;
1406 1411
1407 probe_pcache(); 1412 probe_pcache();
1408 setup_scache(); 1413 setup_scache();
@@ -1465,4 +1470,5 @@ void __cpuinit r4k_cache_init(void)
1465 local_r4k___flush_cache_all(NULL); 1470 local_r4k___flush_cache_all(NULL);
1466#endif 1471#endif
1467 coherency_setup(); 1472 coherency_setup();
1473 board_cache_error_setup = r4k_cache_error_setup;
1468} 1474}