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-rw-r--r--arch/mips/mm/c-r4k.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index b4923a75cb4b..d9bc5d3593b6 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1006,6 +1006,7 @@ static void __cpuinit probe_pcache(void)
1006 case CPU_25KF: 1006 case CPU_25KF:
1007 case CPU_SB1: 1007 case CPU_SB1:
1008 case CPU_SB1A: 1008 case CPU_SB1A:
1009 case CPU_XLR:
1009 c->dcache.flags |= MIPS_CACHE_PINDEX; 1010 c->dcache.flags |= MIPS_CACHE_PINDEX;
1010 break; 1011 break;
1011 1012
@@ -1075,7 +1076,6 @@ static int __cpuinit probe_scache(void)
1075 unsigned long flags, addr, begin, end, pow2; 1076 unsigned long flags, addr, begin, end, pow2;
1076 unsigned int config = read_c0_config(); 1077 unsigned int config = read_c0_config();
1077 struct cpuinfo_mips *c = &current_cpu_data; 1078 struct cpuinfo_mips *c = &current_cpu_data;
1078 int tmp;
1079 1079
1080 if (config & CONF_SC) 1080 if (config & CONF_SC)
1081 return 0; 1081 return 0;
@@ -1108,7 +1108,6 @@ static int __cpuinit probe_scache(void)
1108 1108
1109 /* Now search for the wrap around point. */ 1109 /* Now search for the wrap around point. */
1110 pow2 = (128 * 1024); 1110 pow2 = (128 * 1024);
1111 tmp = 0;
1112 for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) { 1111 for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) {
1113 cache_op(Index_Load_Tag_SD, addr); 1112 cache_op(Index_Load_Tag_SD, addr);
1114 __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */ 1113 __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */