diff options
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 171951d2305b..71fe4cb778cd 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
| @@ -100,6 +100,12 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr) | |||
| 100 | blast_dcache32_page(addr); | 100 | blast_dcache32_page(addr); |
| 101 | } | 101 | } |
| 102 | 102 | ||
| 103 | static inline void r4k_blast_dcache_page_dc64(unsigned long addr) | ||
| 104 | { | ||
| 105 | R4600_HIT_CACHEOP_WAR_IMPL; | ||
| 106 | blast_dcache64_page(addr); | ||
| 107 | } | ||
| 108 | |||
| 103 | static void __cpuinit r4k_blast_dcache_page_setup(void) | 109 | static void __cpuinit r4k_blast_dcache_page_setup(void) |
| 104 | { | 110 | { |
| 105 | unsigned long dc_lsize = cpu_dcache_line_size(); | 111 | unsigned long dc_lsize = cpu_dcache_line_size(); |
| @@ -110,6 +116,8 @@ static void __cpuinit r4k_blast_dcache_page_setup(void) | |||
| 110 | r4k_blast_dcache_page = blast_dcache16_page; | 116 | r4k_blast_dcache_page = blast_dcache16_page; |
| 111 | else if (dc_lsize == 32) | 117 | else if (dc_lsize == 32) |
| 112 | r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; | 118 | r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; |
| 119 | else if (dc_lsize == 64) | ||
| 120 | r4k_blast_dcache_page = r4k_blast_dcache_page_dc64; | ||
| 113 | } | 121 | } |
| 114 | 122 | ||
| 115 | static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); | 123 | static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); |
| @@ -124,6 +132,8 @@ static void __cpuinit r4k_blast_dcache_page_indexed_setup(void) | |||
| 124 | r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed; | 132 | r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed; |
| 125 | else if (dc_lsize == 32) | 133 | else if (dc_lsize == 32) |
| 126 | r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed; | 134 | r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed; |
| 135 | else if (dc_lsize == 64) | ||
| 136 | r4k_blast_dcache_page_indexed = blast_dcache64_page_indexed; | ||
| 127 | } | 137 | } |
| 128 | 138 | ||
| 129 | static void (* r4k_blast_dcache)(void); | 139 | static void (* r4k_blast_dcache)(void); |
| @@ -138,6 +148,8 @@ static void __cpuinit r4k_blast_dcache_setup(void) | |||
| 138 | r4k_blast_dcache = blast_dcache16; | 148 | r4k_blast_dcache = blast_dcache16; |
| 139 | else if (dc_lsize == 32) | 149 | else if (dc_lsize == 32) |
| 140 | r4k_blast_dcache = blast_dcache32; | 150 | r4k_blast_dcache = blast_dcache32; |
| 151 | else if (dc_lsize == 64) | ||
| 152 | r4k_blast_dcache = blast_dcache64; | ||
| 141 | } | 153 | } |
| 142 | 154 | ||
| 143 | /* force code alignment (used for TX49XX_ICACHE_INDEX_INV_WAR) */ | 155 | /* force code alignment (used for TX49XX_ICACHE_INDEX_INV_WAR) */ |
