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-rw-r--r--arch/mips/mm/c-r4k.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 77aefb4ebedd..3d3e53651341 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -14,6 +14,7 @@
14#include <linux/linkage.h> 14#include <linux/linkage.h>
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/mm.h> 16#include <linux/mm.h>
17#include <linux/module.h>
17#include <linux/bitops.h> 18#include <linux/bitops.h>
18 19
19#include <asm/bcache.h> 20#include <asm/bcache.h>
@@ -1216,9 +1217,25 @@ void au1x00_fixup_config_od(void)
1216 } 1217 }
1217} 1218}
1218 1219
1220static int __cpuinitdata cca = -1;
1221
1222static int __init cca_setup(char *str)
1223{
1224 get_option(&str, &cca);
1225
1226 return 1;
1227}
1228
1229__setup("cca=", cca_setup);
1230
1219static void __cpuinit coherency_setup(void) 1231static void __cpuinit coherency_setup(void)
1220{ 1232{
1221 change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); 1233 if (cca < 0 || cca > 7)
1234 cca = read_c0_config() & CONF_CM_CMASK;
1235 _page_cachable_default = cca << _CACHE_SHIFT;
1236
1237 pr_debug("Using cache attribute %d\n", cca);
1238 change_c0_config(CONF_CM_CMASK, cca);
1222 1239
1223 /* 1240 /*
1224 * c0_status.cu=0 specifies that updates by the sc instruction use 1241 * c0_status.cu=0 specifies that updates by the sc instruction use