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-rw-r--r--arch/mips/mm/c-r4k.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index a03ebb2cba67..5ea84bc98c6a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -126,13 +126,13 @@ static inline void tx49_blast_icache32(void)
126 126
127 CACHE32_UNROLL32_ALIGN2; 127 CACHE32_UNROLL32_ALIGN2;
128 /* I'm in even chunk. blast odd chunks */ 128 /* I'm in even chunk. blast odd chunks */
129 for (ws = 0; ws < ws_end; ws += ws_inc) 129 for (ws = 0; ws < ws_end; ws += ws_inc)
130 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 130 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
131 cache32_unroll32(addr|ws,Index_Invalidate_I); 131 cache32_unroll32(addr|ws,Index_Invalidate_I);
132 CACHE32_UNROLL32_ALIGN; 132 CACHE32_UNROLL32_ALIGN;
133 /* I'm in odd chunk. blast even chunks */ 133 /* I'm in odd chunk. blast even chunks */
134 for (ws = 0; ws < ws_end; ws += ws_inc) 134 for (ws = 0; ws < ws_end; ws += ws_inc)
135 for (addr = start; addr < end; addr += 0x400 * 2) 135 for (addr = start; addr < end; addr += 0x400 * 2)
136 cache32_unroll32(addr|ws,Index_Invalidate_I); 136 cache32_unroll32(addr|ws,Index_Invalidate_I);
137} 137}
138 138
@@ -156,13 +156,13 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
156 156
157 CACHE32_UNROLL32_ALIGN2; 157 CACHE32_UNROLL32_ALIGN2;
158 /* I'm in even chunk. blast odd chunks */ 158 /* I'm in even chunk. blast odd chunks */
159 for (ws = 0; ws < ws_end; ws += ws_inc) 159 for (ws = 0; ws < ws_end; ws += ws_inc)
160 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 160 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
161 cache32_unroll32(addr|ws,Index_Invalidate_I); 161 cache32_unroll32(addr|ws,Index_Invalidate_I);
162 CACHE32_UNROLL32_ALIGN; 162 CACHE32_UNROLL32_ALIGN;
163 /* I'm in odd chunk. blast even chunks */ 163 /* I'm in odd chunk. blast even chunks */
164 for (ws = 0; ws < ws_end; ws += ws_inc) 164 for (ws = 0; ws < ws_end; ws += ws_inc)
165 for (addr = start; addr < end; addr += 0x400 * 2) 165 for (addr = start; addr < end; addr += 0x400 * 2)
166 cache32_unroll32(addr|ws,Index_Invalidate_I); 166 cache32_unroll32(addr|ws,Index_Invalidate_I);
167} 167}
168 168
@@ -723,10 +723,10 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
723 ".set push\n\t" 723 ".set push\n\t"
724 ".set noat\n\t" 724 ".set noat\n\t"
725 ".set mips3\n\t" 725 ".set mips3\n\t"
726#ifdef CONFIG_MIPS32 726#ifdef CONFIG_32BIT
727 "la $at,1f\n\t" 727 "la $at,1f\n\t"
728#endif 728#endif
729#ifdef CONFIG_MIPS64 729#ifdef CONFIG_64BIT
730 "dla $at,1f\n\t" 730 "dla $at,1f\n\t"
731#endif 731#endif
732 "cache %0,($at)\n\t" 732 "cache %0,($at)\n\t"