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-rw-r--r--arch/mips/mipssim/sim_time.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 881ecbc1fa23..0cea932f1241 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -91,6 +91,7 @@ unsigned __cpuinit get_c0_compare_int(void)
91 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; 91 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
92 } else { 92 } else {
93#endif 93#endif
94 {
94 if (cpu_has_vint) 95 if (cpu_has_vint)
95 set_vi_handler(cp0_compare_irq, mips_timer_dispatch); 96 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
96 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; 97 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;