diff options
Diffstat (limited to 'arch/mips/mipssim/sim_int.c')
-rw-r--r-- | arch/mips/mipssim/sim_int.c | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c deleted file mode 100644 index 5c779be6f082..000000000000 --- a/arch/mips/mipssim/sim_int.c +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can distribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License (Version 2) as | ||
6 | * published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
11 | * for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along | ||
14 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
15 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
16 | * | ||
17 | */ | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/sched.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/kernel_stat.h> | ||
22 | #include <asm/mips-boards/simint.h> | ||
23 | #include <asm/irq_cpu.h> | ||
24 | |||
25 | static inline int clz(unsigned long x) | ||
26 | { | ||
27 | __asm__( | ||
28 | " .set push \n" | ||
29 | " .set mips32 \n" | ||
30 | " clz %0, %1 \n" | ||
31 | " .set pop \n" | ||
32 | : "=r" (x) | ||
33 | : "r" (x)); | ||
34 | |||
35 | return x; | ||
36 | } | ||
37 | |||
38 | /* | ||
39 | * Version of ffs that only looks at bits 12..15. | ||
40 | */ | ||
41 | static inline unsigned int irq_ffs(unsigned int pending) | ||
42 | { | ||
43 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) | ||
44 | return -clz(pending) + 31 - CAUSEB_IP; | ||
45 | #else | ||
46 | unsigned int a0 = 7; | ||
47 | unsigned int t0; | ||
48 | |||
49 | t0 = s0 & 0xf000; | ||
50 | t0 = t0 < 1; | ||
51 | t0 = t0 << 2; | ||
52 | a0 = a0 - t0; | ||
53 | s0 = s0 << t0; | ||
54 | |||
55 | t0 = s0 & 0xc000; | ||
56 | t0 = t0 < 1; | ||
57 | t0 = t0 << 1; | ||
58 | a0 = a0 - t0; | ||
59 | s0 = s0 << t0; | ||
60 | |||
61 | t0 = s0 & 0x8000; | ||
62 | t0 = t0 < 1; | ||
63 | /* t0 = t0 << 2; */ | ||
64 | a0 = a0 - t0; | ||
65 | /* s0 = s0 << t0; */ | ||
66 | |||
67 | return a0; | ||
68 | #endif | ||
69 | } | ||
70 | |||
71 | asmlinkage void plat_irq_dispatch(void) | ||
72 | { | ||
73 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | ||
74 | int irq; | ||
75 | |||
76 | irq = irq_ffs(pending); | ||
77 | |||
78 | if (irq > 0) | ||
79 | do_IRQ(MIPS_CPU_IRQ_BASE + irq); | ||
80 | else | ||
81 | spurious_interrupt(); | ||
82 | } | ||
83 | |||
84 | void __init arch_init_irq(void) | ||
85 | { | ||
86 | mips_cpu_irq_init(); | ||
87 | } | ||