3 files changed, 5 insertions, 2 deletions

diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 7c710040d3f1..43dba6ce6603 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -74,6 +74,7 @@ static struct irq_chip atlas_irq_type = {
         .mask = disable_atlas_irq,
         .mask_ack = disable_atlas_irq,
         .unmask = enable_atlas_irq,
+        .eoi = enable_atlas_irq,
         .end = end_atlas_irq,
 };
 
@@ -207,7 +208,7 @@ static inline void init_atlas_irqs (int base)
         atlas_hw0_icregs->intrsten = 0xffffffff;
 
         for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
-                set_irq_chip(i, &atlas_irq_type);
+                set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
 }
 
 static struct irqaction atlasirq = {
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index d817c60c5ca5..e4604c73f02e 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -288,6 +288,7 @@ void __init plat_timer_setup(struct irqaction *irq)
            The effect is that the int remains disabled on the second cpu.
            Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
         irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
+        set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
 #endif
 
         /* to generate the first timer interrupt */
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 24a4ed00cc0a..f2d998d2c169 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -203,7 +203,8 @@ void __init plat_timer_setup(struct irqaction *irq)
            on seperate cpu's the first one tries to handle the second interrupt.
            The effect is that the int remains disabled on the second cpu.
            Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
-        irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
+        irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU;
+        set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
 #endif
 
         /* to generate the first timer interrupt */