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-rw-r--r--arch/mips/mips-boards/sim/sim_time.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index d3a21c741514..7224ffe31d36 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -71,8 +71,8 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
71 71
72 int vpflags = dvpe(); 72 int vpflags = dvpe();
73 write_c0_compare (read_c0_count() - 1); 73 write_c0_compare (read_c0_count() - 1);
74 clear_c0_cause(0x100 << MIPSCPU_INT_CPUCTR); 74 clear_c0_cause(0x100 << cp0_compare_irq);
75 set_c0_status(0x100 << MIPSCPU_INT_CPUCTR); 75 set_c0_status(0x100 << cp0_compare_irq);
76 irq_enable_hazard(); 76 irq_enable_hazard();
77 evpe(vpflags); 77 evpe(vpflags);
78 78
@@ -183,8 +183,8 @@ void __init plat_timer_setup(struct irqaction *irq)
183 } 183 }
184 else { 184 else {
185 if (cpu_has_vint) 185 if (cpu_has_vint)
186 set_vi_handler(MIPSCPU_INT_CPUCTR, mips_timer_dispatch); 186 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
187 mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR; 187 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
188 } 188 }
189 189
190 /* we are using the cpu counter for timer interrupts */ 190 /* we are using the cpu counter for timer interrupts */