diff options
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_setup.c')
-rw-r--r-- | arch/mips/mips-boards/malta/malta_setup.c | 210 |
1 files changed, 123 insertions, 87 deletions
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index bc43a5c2224d..2cd8f5734b36 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Carsten Langgaard, carstenl@mips.com | 2 | * Carsten Langgaard, carstenl@mips.com |
3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | 3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
4 | * Copyright (C) Dmitri Vorobiev | ||
4 | * | 5 | * |
5 | * This program is free software; you can distribute it and/or modify it | 6 | * This program is free software; you can distribute it and/or modify it |
6 | * under the terms of the GNU General Public License (Version 2) as | 7 | * under the terms of the GNU General Public License (Version 2) as |
@@ -15,39 +16,57 @@ | |||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | 16 | * with this program; if not, write to the Free Software Foundation, Inc., |
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | 17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
17 | */ | 18 | */ |
19 | #include <linux/cpu.h> | ||
18 | #include <linux/init.h> | 20 | #include <linux/init.h> |
19 | #include <linux/sched.h> | 21 | #include <linux/sched.h> |
20 | #include <linux/ioport.h> | 22 | #include <linux/ioport.h> |
23 | #include <linux/irq.h> | ||
21 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
22 | #include <linux/screen_info.h> | 25 | #include <linux/screen_info.h> |
26 | #include <linux/time.h> | ||
23 | 27 | ||
24 | #include <asm/cpu.h> | ||
25 | #include <asm/bootinfo.h> | 28 | #include <asm/bootinfo.h> |
26 | #include <asm/irq.h> | ||
27 | #include <asm/mips-boards/generic.h> | 29 | #include <asm/mips-boards/generic.h> |
28 | #include <asm/mips-boards/prom.h> | 30 | #include <asm/mips-boards/prom.h> |
29 | #include <asm/mips-boards/malta.h> | 31 | #include <asm/mips-boards/malta.h> |
30 | #include <asm/mips-boards/maltaint.h> | 32 | #include <asm/mips-boards/maltaint.h> |
31 | #include <asm/dma.h> | 33 | #include <asm/dma.h> |
32 | #include <asm/time.h> | ||
33 | #include <asm/traps.h> | 34 | #include <asm/traps.h> |
34 | #ifdef CONFIG_VT | 35 | #ifdef CONFIG_VT |
35 | #include <linux/console.h> | 36 | #include <linux/console.h> |
36 | #endif | 37 | #endif |
37 | 38 | ||
38 | extern void mips_reboot_setup(void); | ||
39 | extern unsigned long mips_rtc_get_time(void); | ||
40 | |||
41 | #ifdef CONFIG_KGDB | ||
42 | extern void kgdb_config(void); | ||
43 | #endif | ||
44 | |||
45 | struct resource standard_io_resources[] = { | 39 | struct resource standard_io_resources[] = { |
46 | { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY }, | 40 | { |
47 | { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY }, | 41 | .name = "dma1", |
48 | { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY }, | 42 | .start = 0x00, |
49 | { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY }, | 43 | .end = 0x1f, |
50 | { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY }, | 44 | .flags = IORESOURCE_BUSY |
45 | }, | ||
46 | { | ||
47 | .name = "timer", | ||
48 | .start = 0x40, | ||
49 | .end = 0x5f, | ||
50 | .flags = IORESOURCE_BUSY | ||
51 | }, | ||
52 | { | ||
53 | .name = "keyboard", | ||
54 | .start = 0x60, | ||
55 | .end = 0x6f, | ||
56 | .flags = IORESOURCE_BUSY | ||
57 | }, | ||
58 | { | ||
59 | .name = "dma page reg", | ||
60 | .start = 0x80, | ||
61 | .end = 0x8f, | ||
62 | .flags = IORESOURCE_BUSY | ||
63 | }, | ||
64 | { | ||
65 | .name = "dma2", | ||
66 | .start = 0xc0, | ||
67 | .end = 0xdf, | ||
68 | .flags = IORESOURCE_BUSY | ||
69 | }, | ||
51 | }; | 70 | }; |
52 | 71 | ||
53 | const char *get_system_type(void) | 72 | const char *get_system_type(void) |
@@ -62,7 +81,7 @@ const char display_string[] = " LINUX ON MALTA "; | |||
62 | #endif /* CONFIG_MIPS_MT_SMTC */ | 81 | #endif /* CONFIG_MIPS_MT_SMTC */ |
63 | 82 | ||
64 | #ifdef CONFIG_BLK_DEV_FD | 83 | #ifdef CONFIG_BLK_DEV_FD |
65 | void __init fd_activate(void) | 84 | static void __init fd_activate(void) |
66 | { | 85 | { |
67 | /* | 86 | /* |
68 | * Activate Floppy Controller in the SMSC FDC37M817 Super I/O | 87 | * Activate Floppy Controller in the SMSC FDC37M817 Super I/O |
@@ -83,6 +102,85 @@ void __init fd_activate(void) | |||
83 | } | 102 | } |
84 | #endif | 103 | #endif |
85 | 104 | ||
105 | #ifdef CONFIG_BLK_DEV_IDE | ||
106 | static void __init pci_clock_check(void) | ||
107 | { | ||
108 | unsigned int __iomem *jmpr_p = | ||
109 | (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int)); | ||
110 | int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07; | ||
111 | static const int pciclocks[] __initdata = { | ||
112 | 33, 20, 25, 30, 12, 16, 37, 10 | ||
113 | }; | ||
114 | int pciclock = pciclocks[jmpr]; | ||
115 | char *argptr = prom_getcmdline(); | ||
116 | |||
117 | if (pciclock != 33 && !strstr(argptr, "idebus=")) { | ||
118 | printk(KERN_WARNING "WARNING: PCI clock is %dMHz, " | ||
119 | "setting idebus\n", pciclock); | ||
120 | argptr += strlen(argptr); | ||
121 | sprintf(argptr, " idebus=%d", pciclock); | ||
122 | if (pciclock < 20 || pciclock > 66) | ||
123 | printk(KERN_WARNING "WARNING: IDE timing " | ||
124 | "calculations will be incorrect\n"); | ||
125 | } | ||
126 | } | ||
127 | #endif | ||
128 | |||
129 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) | ||
130 | static void __init screen_info_setup(void) | ||
131 | { | ||
132 | screen_info = (struct screen_info) { | ||
133 | .orig_x = 0, | ||
134 | .orig_y = 25, | ||
135 | .ext_mem_k = 0, | ||
136 | .orig_video_page = 0, | ||
137 | .orig_video_mode = 0, | ||
138 | .orig_video_cols = 80, | ||
139 | .unused2 = 0, | ||
140 | .orig_video_ega_bx = 0, | ||
141 | .unused3 = 0, | ||
142 | .orig_video_lines = 25, | ||
143 | .orig_video_isVGA = VIDEO_TYPE_VGAC, | ||
144 | .orig_video_points = 16 | ||
145 | }; | ||
146 | } | ||
147 | #endif | ||
148 | |||
149 | static void __init bonito_quirks_setup(void) | ||
150 | { | ||
151 | char *argptr; | ||
152 | |||
153 | argptr = prom_getcmdline(); | ||
154 | if (strstr(argptr, "debug")) { | ||
155 | BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; | ||
156 | printk(KERN_INFO "Enabled Bonito debug mode\n"); | ||
157 | } else | ||
158 | BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; | ||
159 | |||
160 | #ifdef CONFIG_DMA_COHERENT | ||
161 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { | ||
162 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; | ||
163 | printk(KERN_INFO "Enabled Bonito CPU coherency\n"); | ||
164 | |||
165 | argptr = prom_getcmdline(); | ||
166 | if (strstr(argptr, "iobcuncached")) { | ||
167 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
168 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & | ||
169 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
170 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
171 | printk(KERN_INFO "Disabled Bonito IOBC coherency\n"); | ||
172 | } else { | ||
173 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
174 | BONITO_PCIMEMBASECFG |= | ||
175 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
176 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
177 | printk(KERN_INFO "Enabled Bonito IOBC coherency\n"); | ||
178 | } | ||
179 | } else | ||
180 | panic("Hardware DMA cache coherency not supported"); | ||
181 | #endif | ||
182 | } | ||
183 | |||
86 | void __init plat_mem_setup(void) | 184 | void __init plat_mem_setup(void) |
87 | { | 185 | { |
88 | unsigned int i; | 186 | unsigned int i; |
@@ -102,86 +200,24 @@ void __init plat_mem_setup(void) | |||
102 | kgdb_config(); | 200 | kgdb_config(); |
103 | #endif | 201 | #endif |
104 | 202 | ||
105 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { | ||
106 | char *argptr; | ||
107 | |||
108 | argptr = prom_getcmdline(); | ||
109 | if (strstr(argptr, "debug")) { | ||
110 | BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; | ||
111 | printk("Enabled Bonito debug mode\n"); | ||
112 | } | ||
113 | else | ||
114 | BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; | ||
115 | |||
116 | #ifdef CONFIG_DMA_COHERENT | ||
117 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { | ||
118 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; | ||
119 | printk("Enabled Bonito CPU coherency\n"); | ||
120 | |||
121 | argptr = prom_getcmdline(); | ||
122 | if (strstr(argptr, "iobcuncached")) { | ||
123 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
124 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & | ||
125 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
126 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
127 | printk("Disabled Bonito IOBC coherency\n"); | ||
128 | } | ||
129 | else { | ||
130 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
131 | BONITO_PCIMEMBASECFG |= | ||
132 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
133 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
134 | printk("Enabled Bonito IOBC coherency\n"); | ||
135 | } | ||
136 | } | ||
137 | else | ||
138 | panic("Hardware DMA cache coherency not supported"); | ||
139 | |||
140 | #endif | ||
141 | } | ||
142 | #ifdef CONFIG_DMA_COHERENT | 203 | #ifdef CONFIG_DMA_COHERENT |
143 | else { | 204 | if (mips_revision_sconid != MIPS_REVISION_SCON_BONITO) |
144 | panic("Hardware DMA cache coherency not supported"); | 205 | panic("Hardware DMA cache coherency not supported"); |
145 | } | ||
146 | #endif | 206 | #endif |
147 | 207 | ||
208 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) | ||
209 | bonito_quirks_setup(); | ||
210 | |||
148 | #ifdef CONFIG_BLK_DEV_IDE | 211 | #ifdef CONFIG_BLK_DEV_IDE |
149 | /* Check PCI clock */ | 212 | pci_clock_check(); |
150 | { | ||
151 | unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int)); | ||
152 | int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07; | ||
153 | static const int pciclocks[] __initdata = { | ||
154 | 33, 20, 25, 30, 12, 16, 37, 10 | ||
155 | }; | ||
156 | int pciclock = pciclocks[jmpr]; | ||
157 | char *argptr = prom_getcmdline(); | ||
158 | |||
159 | if (pciclock != 33 && !strstr (argptr, "idebus=")) { | ||
160 | printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock); | ||
161 | argptr += strlen(argptr); | ||
162 | sprintf(argptr, " idebus=%d", pciclock); | ||
163 | if (pciclock < 20 || pciclock > 66) | ||
164 | printk("WARNING: IDE timing calculations will be incorrect\n"); | ||
165 | } | ||
166 | } | ||
167 | #endif | 213 | #endif |
214 | |||
168 | #ifdef CONFIG_BLK_DEV_FD | 215 | #ifdef CONFIG_BLK_DEV_FD |
169 | fd_activate(); | 216 | fd_activate(); |
170 | #endif | 217 | #endif |
171 | #ifdef CONFIG_VT | 218 | |
172 | #if defined(CONFIG_VGA_CONSOLE) | 219 | #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) |
173 | screen_info = (struct screen_info) { | 220 | screen_info_setup(); |
174 | 0, 25, /* orig-x, orig-y */ | ||
175 | 0, /* unused */ | ||
176 | 0, /* orig-video-page */ | ||
177 | 0, /* orig-video-mode */ | ||
178 | 80, /* orig-video-cols */ | ||
179 | 0, 0, 0, /* ega_ax, ega_bx, ega_cx */ | ||
180 | 25, /* orig-video-lines */ | ||
181 | VIDEO_TYPE_VGAC, /* orig-video-isVGA */ | ||
182 | 16 /* orig-video-points */ | ||
183 | }; | ||
184 | #endif | ||
185 | #endif | 221 | #endif |
186 | mips_reboot_setup(); | 222 | mips_reboot_setup(); |
187 | } | 223 | } |