4 files changed, 12 insertions, 12 deletions

diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index e2c7147fedf7..30f1f54cb68b 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -166,15 +166,15 @@ static void __init console_config(void)
                         bits = '8';
                 if (flow == '\0')
                         flow = 'r';
-                sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
-                strcat (prom_getcmdline(), console_string);
+                sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
+                strcat(prom_getcmdline(), console_string);
                 pr_info("Config serial console:%s\n", console_string);
         }
 }
 #endif
 
 #ifdef CONFIG_KGDB
-void __init kgdb_config (void)
+void __init kgdb_config(void)
 {
         extern int (*generic_putDebugChar)(char);
         extern char (*generic_getDebugChar)(void);
@@ -218,7 +218,7 @@ void __init kgdb_config (void)
                 {
                         char *s;
                         for (s = "Please connect GDB to this port\r\n"; *s; )
-                                generic_putDebugChar (*s++);
+                                generic_putDebugChar(*s++);
                 }
 
                 /* Breakpoint is invoked after interrupts are initialised */
@@ -226,7 +226,7 @@ void __init kgdb_config (void)
 }
 #endif
 
-void __init mips_nmi_setup (void)
+void __init mips_nmi_setup(void)
 {
         void *base;
         extern char except_vec_nmi;
@@ -238,7 +238,7 @@ void __init mips_nmi_setup (void)
         flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
 }
 
-void __init mips_ejtag_setup (void)
+void __init mips_ejtag_setup(void)
 {
         void *base;
         extern char except_vec_ejtag_debug;
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index ae39953da2c4..dc272c188233 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -125,7 +125,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
         return &mdesc[0];
 }
 
-static int __init prom_memtype_classify (unsigned int type)
+static int __init prom_memtype_classify(unsigned int type)
 {
         switch (type) {
         case yamon_free:
@@ -158,7 +158,7 @@ void __init prom_meminit(void)
                 long type;
                 unsigned long base, size;
 
-                type = prom_memtype_classify (p->type);
+                type = prom_memtype_classify(p->type);
                 base = p->base;
                 size = p->size;
 
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index c9852206890a..b9743190609a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -239,5 +239,5 @@ void __init mips_pcibios_init(void)
         iomem_resource.end &= 0xfffffffffULL;                   /* 64 GB */
         ioport_resource.end = controller->io_resource->end;
 
-        register_pci_controller (controller);
+        register_pci_controller(controller);
 }
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 4fab3b2e8736..1d00b778ff1e 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -134,7 +134,7 @@ void __init plat_time_init(void)
         /* Set Data mode - binary. */
         CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
 
-        est_freq = estimate_cpu_frequency ();
+        est_freq = estimate_cpu_frequency();
 
         printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
                (est_freq%1000000)*100/1000000);
@@ -166,7 +166,7 @@ void __init plat_perf_setup(void)
 
 #ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_PERFCTR, mips_perf_dispatch);
+                set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
                 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
         } else
 #endif
@@ -183,7 +183,7 @@ void __init plat_timer_setup(struct irqaction *irq)
 {
 #ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch);
+                set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
                 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
         }
         else