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-rw-r--r--arch/mips/mips-boards/generic/init.c343
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diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
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1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * PROM library initialisation code.
19 */
20#include <linux/config.h>
21#include <linux/init.h>
22#include <linux/string.h>
23#include <linux/kernel.h>
24
25#include <asm/io.h>
26#include <asm/bootinfo.h>
27#include <asm/mips-boards/prom.h>
28#include <asm/mips-boards/generic.h>
29#ifdef CONFIG_MIPS_GT64120
30#include <asm/gt64120.h>
31#endif
32#include <asm/mips-boards/msc01_pci.h>
33#include <asm/mips-boards/bonito64.h>
34#ifdef CONFIG_MIPS_MALTA
35#include <asm/mips-boards/malta.h>
36#endif
37
38#ifdef CONFIG_KGDB
39extern int rs_kgdb_hook(int, int);
40extern int rs_putDebugChar(char);
41extern char rs_getDebugChar(void);
42extern int saa9730_kgdb_hook(int);
43extern int saa9730_putDebugChar(char);
44extern char saa9730_getDebugChar(void);
45#endif
46
47int prom_argc;
48int *_prom_argv, *_prom_envp;
49
50/*
51 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
52 * This macro take care of sign extension, if running in 64-bit mode.
53 */
54#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
55
56int init_debug = 0;
57
58unsigned int mips_revision_corid;
59
60/* Bonito64 system controller register base. */
61unsigned long _pcictrl_bonito;
62unsigned long _pcictrl_bonito_pcicfg;
63
64/* GT64120 system controller register base */
65unsigned long _pcictrl_gt64120;
66
67/* MIPS System controller register base */
68unsigned long _pcictrl_msc;
69
70char *prom_getenv(char *envname)
71{
72 /*
73 * Return a pointer to the given environment variable.
74 * In 64-bit mode: we're using 64-bit pointers, but all pointers
75 * in the PROM structures are only 32-bit, so we need some
76 * workarounds, if we are running in 64-bit mode.
77 */
78 int i, index=0;
79
80 i = strlen(envname);
81
82 while (prom_envp(index)) {
83 if(strncmp(envname, prom_envp(index), i) == 0) {
84 return(prom_envp(index+1));
85 }
86 index += 2;
87 }
88
89 return NULL;
90}
91
92static inline unsigned char str2hexnum(unsigned char c)
93{
94 if (c >= '0' && c <= '9')
95 return c - '0';
96 if (c >= 'a' && c <= 'f')
97 return c - 'a' + 10;
98 return 0; /* foo */
99}
100
101static inline void str2eaddr(unsigned char *ea, unsigned char *str)
102{
103 int i;
104
105 for (i = 0; i < 6; i++) {
106 unsigned char num;
107
108 if((*str == '.') || (*str == ':'))
109 str++;
110 num = str2hexnum(*str++) << 4;
111 num |= (str2hexnum(*str++));
112 ea[i] = num;
113 }
114}
115
116int get_ethernet_addr(char *ethernet_addr)
117{
118 char *ethaddr_str;
119
120 ethaddr_str = prom_getenv("ethaddr");
121 if (!ethaddr_str) {
122 printk("ethaddr not set in boot prom\n");
123 return -1;
124 }
125 str2eaddr(ethernet_addr, ethaddr_str);
126
127 if (init_debug > 1) {
128 int i;
129 printk("get_ethernet_addr: ");
130 for (i=0; i<5; i++)
131 printk("%02x:", (unsigned char)*(ethernet_addr+i));
132 printk("%02x\n", *(ethernet_addr+i));
133 }
134
135 return 0;
136}
137
138#ifdef CONFIG_SERIAL_8250_CONSOLE
139static void __init console_config(void)
140{
141 char console_string[40];
142 int baud = 0;
143 char parity = '\0', bits = '\0', flow = '\0';
144 char *s;
145
146 if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL) {
147 s = prom_getenv("modetty0");
148 if (s) {
149 while (*s >= '0' && *s <= '9')
150 baud = baud*10 + *s++ - '0';
151 if (*s == ',') s++;
152 if (*s) parity = *s++;
153 if (*s == ',') s++;
154 if (*s) bits = *s++;
155 if (*s == ',') s++;
156 if (*s == 'h') flow = 'r';
157 }
158 if (baud == 0)
159 baud = 38400;
160 if (parity != 'n' && parity != 'o' && parity != 'e')
161 parity = 'n';
162 if (bits != '7' && bits != '8')
163 bits = '8';
164 if (flow == '\0')
165 flow = 'r';
166 sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
167 strcat (prom_getcmdline(), console_string);
168 prom_printf("Config serial console:%s\n", console_string);
169 }
170}
171#endif
172
173#ifdef CONFIG_KGDB
174void __init kgdb_config (void)
175{
176 extern int (*generic_putDebugChar)(char);
177 extern char (*generic_getDebugChar)(void);
178 char *argptr;
179 int line, speed;
180
181 argptr = prom_getcmdline();
182 if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
183 argptr += strlen("kgdb=ttyS");
184 if (*argptr != '0' && *argptr != '1')
185 printk("KGDB: Unknown serial line /dev/ttyS%c, "
186 "falling back to /dev/ttyS1\n", *argptr);
187 line = *argptr == '0' ? 0 : 1;
188 printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
189
190 speed = 0;
191 if (*++argptr == ',')
192 {
193 int c;
194 while ((c = *++argptr) && ('0' <= c && c <= '9'))
195 speed = speed * 10 + c - '0';
196 }
197#ifdef CONFIG_MIPS_ATLAS
198 if (line == 1) {
199 speed = saa9730_kgdb_hook(speed);
200 generic_putDebugChar = saa9730_putDebugChar;
201 generic_getDebugChar = saa9730_getDebugChar;
202 }
203 else
204#endif
205 {
206 speed = rs_kgdb_hook(line, speed);
207 generic_putDebugChar = rs_putDebugChar;
208 generic_getDebugChar = rs_getDebugChar;
209 }
210
211 prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, "
212 "please connect your debugger\n", line ? 1 : 0, speed);
213
214 {
215 char *s;
216 for (s = "Please connect GDB to this port\r\n"; *s; )
217 generic_putDebugChar (*s++);
218 }
219
220 kgdb_enabled = 1;
221 /* Breakpoint is invoked after interrupts are initialised */
222 }
223}
224#endif
225
226void __init prom_init(void)
227{
228 prom_argc = fw_arg0;
229 _prom_argv = (int *) fw_arg1;
230 _prom_envp = (int *) fw_arg2;
231
232 mips_display_message("LINUX");
233
234#ifdef CONFIG_MIPS_SEAD
235 set_io_port_base(KSEG1);
236#else
237 /*
238 * early setup of _pcictrl_bonito so that we can determine
239 * the system controller on a CORE_EMUL board
240 */
241 _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
242
243 mips_revision_corid = MIPS_REVISION_CORID;
244
245 if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
246 if (BONITO_PCIDID == 0x0001df53 ||
247 BONITO_PCIDID == 0x0003df53)
248 mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
249 else
250 mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
251 }
252 switch(mips_revision_corid) {
253 case MIPS_REVISION_CORID_QED_RM5261:
254 case MIPS_REVISION_CORID_CORE_LV:
255 case MIPS_REVISION_CORID_CORE_FPGA:
256 case MIPS_REVISION_CORID_CORE_FPGAR2:
257 /*
258 * Setup the North bridge to do Master byte-lane swapping
259 * when running in bigendian.
260 */
261 _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
262
263#ifdef CONFIG_CPU_LITTLE_ENDIAN
264 GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
265 GT_PCI0_CMD_SBYTESWAP_BIT);
266#else
267 GT_WRITE(GT_PCI0_CMD_OFS, 0);
268#endif
269
270#ifdef CONFIG_MIPS_MALTA
271 set_io_port_base(MALTA_GT_PORT_BASE);
272#else
273 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
274#endif
275 break;
276
277 case MIPS_REVISION_CORID_CORE_EMUL_BON:
278 case MIPS_REVISION_CORID_BONITO64:
279 case MIPS_REVISION_CORID_CORE_20K:
280 _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
281
282 /*
283 * Disable Bonito IOBC.
284 */
285 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
286 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
287 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
288
289 /*
290 * Setup the North bridge to do Master byte-lane swapping
291 * when running in bigendian.
292 */
293#ifdef CONFIG_CPU_LITTLE_ENDIAN
294 BONITO_BONGENCFG = BONITO_BONGENCFG &
295 ~(BONITO_BONGENCFG_MSTRBYTESWAP |
296 BONITO_BONGENCFG_BYTESWAP);
297#else
298 BONITO_BONGENCFG = BONITO_BONGENCFG |
299 BONITO_BONGENCFG_MSTRBYTESWAP |
300 BONITO_BONGENCFG_BYTESWAP;
301#endif
302
303#ifdef CONFIG_MIPS_MALTA
304 set_io_port_base(MALTA_BONITO_PORT_BASE);
305#else
306 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
307#endif
308 break;
309
310 case MIPS_REVISION_CORID_CORE_MSC:
311 case MIPS_REVISION_CORID_CORE_FPGA2:
312 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
313 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
314
315#ifdef CONFIG_CPU_LITTLE_ENDIAN
316 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
317#else
318 MSC_WRITE(MSC01_PCI_SWAP,
319 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
320 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
321 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
322#endif
323
324#ifdef CONFIG_MIPS_MALTA
325 set_io_port_base(MALTA_MSC_PORT_BASE);
326#else
327 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
328#endif
329 break;
330
331 default:
332 /* Unknown Core card */
333 mips_display_message("CC Error");
334 while(1); /* We die here... */
335 }
336#endif
337 prom_printf("\nLINUX started...\n");
338 prom_init_cmdline();
339 prom_meminit();
340#ifdef CONFIG_SERIAL_8250_CONSOLE
341 console_config();
342#endif
343}
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