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-rw-r--r--arch/mips/math-emu/dp_add.c4
-rw-r--r--arch/mips/math-emu/dp_div.c4
-rw-r--r--arch/mips/math-emu/dp_fint.c4
-rw-r--r--arch/mips/math-emu/dp_flong.c8
-rw-r--r--arch/mips/math-emu/dp_fsp.c8
-rw-r--r--arch/mips/math-emu/dp_modf.c8
-rw-r--r--arch/mips/math-emu/dp_mul.c12
-rw-r--r--arch/mips/math-emu/dp_sub.c4
-rw-r--r--arch/mips/math-emu/dp_tint.c10
-rw-r--r--arch/mips/math-emu/dp_tlong.c10
-rw-r--r--arch/mips/math-emu/ieee754dp.c14
-rw-r--r--arch/mips/math-emu/ieee754dp.h6
-rw-r--r--arch/mips/math-emu/ieee754int.h12
-rw-r--r--arch/mips/math-emu/ieee754sp.c14
-rw-r--r--arch/mips/math-emu/ieee754sp.h8
-rw-r--r--arch/mips/math-emu/sp_add.c4
-rw-r--r--arch/mips/math-emu/sp_div.c4
-rw-r--r--arch/mips/math-emu/sp_fdp.c8
-rw-r--r--arch/mips/math-emu/sp_fint.c8
-rw-r--r--arch/mips/math-emu/sp_flong.c8
-rw-r--r--arch/mips/math-emu/sp_modf.c8
-rw-r--r--arch/mips/math-emu/sp_mul.c12
-rw-r--r--arch/mips/math-emu/sp_sub.c4
-rw-r--r--arch/mips/math-emu/sp_tint.c8
-rw-r--r--arch/mips/math-emu/sp_tlong.c10
25 files changed, 100 insertions, 100 deletions
diff --git a/arch/mips/math-emu/dp_add.c b/arch/mips/math-emu/dp_add.c
index 7daaafcfeb78..f1c8e70e8beb 100644
--- a/arch/mips/math-emu/dp_add.c
+++ b/arch/mips/math-emu/dp_add.c
@@ -153,7 +153,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
153 xe = xe; 153 xe = xe;
154 xs = xs; 154 xs = xs;
155 155
156 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ 156 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
157 xm = XDPSRS1(xm); 157 xm = XDPSRS1(xm);
158 xe++; 158 xe++;
159 } 159 }
@@ -172,7 +172,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
172 IEEE754_RD); 172 IEEE754_RD);
173 173
174 /* normalize to rounding precision */ 174 /* normalize to rounding precision */
175 while ((xm >> (DP_MBITS + 3)) == 0) { 175 while ((xm >> (DP_FBITS + 3)) == 0) {
176 xm <<= 1; 176 xm <<= 1;
177 xe--; 177 xe--;
178 } 178 }
diff --git a/arch/mips/math-emu/dp_div.c b/arch/mips/math-emu/dp_div.c
index 3b568b718d52..13ecffa9c25e 100644
--- a/arch/mips/math-emu/dp_div.c
+++ b/arch/mips/math-emu/dp_div.c
@@ -129,7 +129,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
129 int re = xe - ye; 129 int re = xe - ye;
130 u64 bm; 130 u64 bm;
131 131
132 for (bm = DP_MBIT(DP_MBITS + 2); bm; bm >>= 1) { 132 for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) {
133 if (xm >= ym) { 133 if (xm >= ym) {
134 xm -= ym; 134 xm -= ym;
135 rm |= bm; 135 rm |= bm;
@@ -146,7 +146,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
146 146
147 /* normalise rm to rounding precision ? 147 /* normalise rm to rounding precision ?
148 */ 148 */
149 while ((rm >> (DP_MBITS + 3)) == 0) { 149 while ((rm >> (DP_FBITS + 3)) == 0) {
150 rm <<= 1; 150 rm <<= 1;
151 re--; 151 re--;
152 } 152 }
diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c
index 4b5ee799b4a4..196a010ff09d 100644
--- a/arch/mips/math-emu/dp_fint.c
+++ b/arch/mips/math-emu/dp_fint.c
@@ -52,8 +52,8 @@ union ieee754dp ieee754dp_fint(int x)
52 } 52 }
53 53
54 /* normalize - result can never be inexact or overflow */ 54 /* normalize - result can never be inexact or overflow */
55 xe = DP_MBITS; 55 xe = DP_FBITS;
56 while ((xm >> DP_MBITS) == 0) { 56 while ((xm >> DP_FBITS) == 0) {
57 xm <<= 1; 57 xm <<= 1;
58 xe--; 58 xe--;
59 } 59 }
diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c
index 89bd57917c94..915072d82c20 100644
--- a/arch/mips/math-emu/dp_flong.c
+++ b/arch/mips/math-emu/dp_flong.c
@@ -52,15 +52,15 @@ union ieee754dp ieee754dp_flong(s64 x)
52 } 52 }
53 53
54 /* normalize */ 54 /* normalize */
55 xe = DP_MBITS + 3; 55 xe = DP_FBITS + 3;
56 if (xm >> (DP_MBITS + 1 + 3)) { 56 if (xm >> (DP_FBITS + 1 + 3)) {
57 /* shunt out overflow bits */ 57 /* shunt out overflow bits */
58 while (xm >> (DP_MBITS + 1 + 3)) { 58 while (xm >> (DP_FBITS + 1 + 3)) {
59 XDPSRSX1(); 59 XDPSRSX1();
60 } 60 }
61 } else { 61 } else {
62 /* normalize in grs extended double precision */ 62 /* normalize in grs extended double precision */
63 while ((xm >> (DP_MBITS + 3)) == 0) { 63 while ((xm >> (DP_FBITS + 3)) == 0) {
64 xm <<= 1; 64 xm <<= 1;
65 xe--; 65 xe--;
66 } 66 }
diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c
index cacd9f328690..7ddb506153e1 100644
--- a/arch/mips/math-emu/dp_fsp.c
+++ b/arch/mips/math-emu/dp_fsp.c
@@ -44,8 +44,8 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
44 return ieee754dp_nanxcpt(builddp(xs, 44 return ieee754dp_nanxcpt(builddp(xs,
45 DP_EMAX + 1 + DP_EBIAS, 45 DP_EMAX + 1 + DP_EBIAS,
46 ((u64) xm 46 ((u64) xm
47 << (DP_MBITS - 47 << (DP_FBITS -
48 SP_MBITS))), "fsp", 48 SP_FBITS))), "fsp",
49 x); 49 x);
50 case IEEE754_CLASS_INF: 50 case IEEE754_CLASS_INF:
51 return ieee754dp_inf(xs); 51 return ieee754dp_inf(xs);
@@ -53,7 +53,7 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
53 return ieee754dp_zero(xs); 53 return ieee754dp_zero(xs);
54 case IEEE754_CLASS_DNORM: 54 case IEEE754_CLASS_DNORM:
55 /* normalize */ 55 /* normalize */
56 while ((xm >> SP_MBITS) == 0) { 56 while ((xm >> SP_FBITS) == 0) {
57 xm <<= 1; 57 xm <<= 1;
58 xe--; 58 xe--;
59 } 59 }
@@ -69,5 +69,5 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
69 xm &= ~SP_HIDDEN_BIT; 69 xm &= ~SP_HIDDEN_BIT;
70 70
71 return builddp(xs, xe + DP_EBIAS, 71 return builddp(xs, xe + DP_EBIAS,
72 (u64) xm << (DP_MBITS - SP_MBITS)); 72 (u64) xm << (DP_FBITS - SP_FBITS));
73} 73}
diff --git a/arch/mips/math-emu/dp_modf.c b/arch/mips/math-emu/dp_modf.c
index 61733ff512c7..d83ec44f1a33 100644
--- a/arch/mips/math-emu/dp_modf.c
+++ b/arch/mips/math-emu/dp_modf.c
@@ -54,24 +54,24 @@ union ieee754dp ieee754dp_modf(union ieee754dp x, union ieee754dp *ip)
54 *ip = ieee754dp_zero(xs); 54 *ip = ieee754dp_zero(xs);
55 return x; 55 return x;
56 } 56 }
57 if (xe >= DP_MBITS) { 57 if (xe >= DP_FBITS) {
58 *ip = x; 58 *ip = x;
59 return ieee754dp_zero(xs); 59 return ieee754dp_zero(xs);
60 } 60 }
61 /* generate ipart mantissa by clearing bottom bits 61 /* generate ipart mantissa by clearing bottom bits
62 */ 62 */
63 *ip = builddp(xs, xe + DP_EBIAS, 63 *ip = builddp(xs, xe + DP_EBIAS,
64 ((xm >> (DP_MBITS - xe)) << (DP_MBITS - xe)) & 64 ((xm >> (DP_FBITS - xe)) << (DP_FBITS - xe)) &
65 ~DP_HIDDEN_BIT); 65 ~DP_HIDDEN_BIT);
66 66
67 /* generate fpart mantissa by clearing top bits 67 /* generate fpart mantissa by clearing top bits
68 * and normalizing (must be able to normalize) 68 * and normalizing (must be able to normalize)
69 */ 69 */
70 xm = (xm << (64 - (DP_MBITS - xe))) >> (64 - (DP_MBITS - xe)); 70 xm = (xm << (64 - (DP_FBITS - xe))) >> (64 - (DP_FBITS - xe));
71 if (xm == 0) 71 if (xm == 0)
72 return ieee754dp_zero(xs); 72 return ieee754dp_zero(xs);
73 73
74 while ((xm >> DP_MBITS) == 0) { 74 while ((xm >> DP_FBITS) == 0) {
75 xm <<= 1; 75 xm <<= 1;
76 xe--; 76 xe--;
77 } 77 }
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index 8f1bef91aa95..56fb309b42c1 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -113,8 +113,8 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
113 u64 rm; 113 u64 rm;
114 114
115 /* shunt to top of word */ 115 /* shunt to top of word */
116 xm <<= 64 - (DP_MBITS + 1); 116 xm <<= 64 - (DP_FBITS + 1);
117 ym <<= 64 - (DP_MBITS + 1); 117 ym <<= 64 - (DP_FBITS + 1);
118 118
119 /* multiply 32bits xm,ym to give high 32bits rm with stickness 119 /* multiply 32bits xm,ym to give high 32bits rm with stickness
120 */ 120 */
@@ -162,13 +162,13 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
162 */ 162 */
163 if ((s64) rm < 0) { 163 if ((s64) rm < 0) {
164 rm = 164 rm =
165 (rm >> (64 - (DP_MBITS + 1 + 3))) | 165 (rm >> (64 - (DP_FBITS + 1 + 3))) |
166 ((rm << (DP_MBITS + 1 + 3)) != 0); 166 ((rm << (DP_FBITS + 1 + 3)) != 0);
167 re++; 167 re++;
168 } else { 168 } else {
169 rm = 169 rm =
170 (rm >> (64 - (DP_MBITS + 1 + 3 + 1))) | 170 (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) |
171 ((rm << (DP_MBITS + 1 + 3 + 1)) != 0); 171 ((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
172 } 172 }
173 assert(rm & (DP_HIDDEN_BIT << 3)); 173 assert(rm & (DP_HIDDEN_BIT << 3));
174 DPNORMRET2(rs, re, rm, "mul", x, y); 174 DPNORMRET2(rs, re, rm, "mul", x, y);
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index e369c7b07f5e..25d25bc8d977 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -158,7 +158,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
158 xe = xe; 158 xe = xe;
159 xs = xs; 159 xs = xs;
160 160
161 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ 161 if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
162 xm = XDPSRS1(xm); /* shift preserving sticky */ 162 xm = XDPSRS1(xm); /* shift preserving sticky */
163 xe++; 163 xe++;
164 } 164 }
@@ -181,7 +181,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
181 181
182 /* normalize to rounding precision 182 /* normalize to rounding precision
183 */ 183 */
184 while ((xm >> (DP_MBITS + 3)) == 0) { 184 while ((xm >> (DP_FBITS + 3)) == 0) {
185 xm <<= 1; 185 xm <<= 1;
186 xe--; 186 xe--;
187 } 187 }
diff --git a/arch/mips/math-emu/dp_tint.c b/arch/mips/math-emu/dp_tint.c
index 792470c53779..8c39a40d7fe9 100644
--- a/arch/mips/math-emu/dp_tint.c
+++ b/arch/mips/math-emu/dp_tint.c
@@ -54,9 +54,9 @@ int ieee754dp_tint(union ieee754dp x)
54 return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x); 54 return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x);
55 } 55 }
56 /* oh gawd */ 56 /* oh gawd */
57 if (xe > DP_MBITS) { 57 if (xe > DP_FBITS) {
58 xm <<= xe - DP_MBITS; 58 xm <<= xe - DP_FBITS;
59 } else if (xe < DP_MBITS) { 59 } else if (xe < DP_FBITS) {
60 u64 residue; 60 u64 residue;
61 int round; 61 int round;
62 int sticky; 62 int sticky;
@@ -68,10 +68,10 @@ int ieee754dp_tint(union ieee754dp x)
68 sticky = residue != 0; 68 sticky = residue != 0;
69 xm = 0; 69 xm = 0;
70 } else { 70 } else {
71 residue = xm << (64 - DP_MBITS + xe); 71 residue = xm << (64 - DP_FBITS + xe);
72 round = (residue >> 63) != 0; 72 round = (residue >> 63) != 0;
73 sticky = (residue << 1) != 0; 73 sticky = (residue << 1) != 0;
74 xm >>= DP_MBITS - xe; 74 xm >>= DP_FBITS - xe;
75 } 75 }
76 /* Note: At this point upper 32 bits of xm are guaranteed 76 /* Note: At this point upper 32 bits of xm are guaranteed
77 to be zero */ 77 to be zero */
diff --git a/arch/mips/math-emu/dp_tlong.c b/arch/mips/math-emu/dp_tlong.c
index fcc1c4f50e98..2653b6eac689 100644
--- a/arch/mips/math-emu/dp_tlong.c
+++ b/arch/mips/math-emu/dp_tlong.c
@@ -57,9 +57,9 @@ s64 ieee754dp_tlong(union ieee754dp x)
57 return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x); 57 return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x);
58 } 58 }
59 /* oh gawd */ 59 /* oh gawd */
60 if (xe > DP_MBITS) { 60 if (xe > DP_FBITS) {
61 xm <<= xe - DP_MBITS; 61 xm <<= xe - DP_FBITS;
62 } else if (xe < DP_MBITS) { 62 } else if (xe < DP_FBITS) {
63 u64 residue; 63 u64 residue;
64 int round; 64 int round;
65 int sticky; 65 int sticky;
@@ -75,10 +75,10 @@ s64 ieee754dp_tlong(union ieee754dp x)
75 * so we do it in two steps. Be aware that xe 75 * so we do it in two steps. Be aware that xe
76 * may be -1 */ 76 * may be -1 */
77 residue = xm << (xe + 1); 77 residue = xm << (xe + 1);
78 residue <<= 63 - DP_MBITS; 78 residue <<= 63 - DP_FBITS;
79 round = (residue >> 63) != 0; 79 round = (residue >> 63) != 0;
80 sticky = (residue << 1) != 0; 80 sticky = (residue << 1) != 0;
81 xm >>= DP_MBITS - xe; 81 xm >>= DP_FBITS - xe;
82 } 82 }
83 odd = (xm & 0x1) != 0x0; 83 odd = (xm & 0x1) != 0x0;
84 switch (ieee754_csr.rm) { 84 switch (ieee754_csr.rm) {
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index a8eb0142ca17..9be2d7836f81 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -43,7 +43,7 @@ int ieee754dp_isnan(union ieee754dp x)
43int ieee754dp_issnan(union ieee754dp x) 43int ieee754dp_issnan(union ieee754dp x)
44{ 44{
45 assert(ieee754dp_isnan(x)); 45 assert(ieee754dp_isnan(x));
46 return ((DPMANT(x) & DP_MBIT(DP_MBITS-1)) == DP_MBIT(DP_MBITS-1)); 46 return ((DPMANT(x) & DP_MBIT(DP_FBITS-1)) == DP_MBIT(DP_FBITS-1));
47} 47}
48 48
49 49
@@ -73,7 +73,7 @@ union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r, const char *op, ...)
73 73
74 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) { 74 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
75 /* not enabled convert to a quiet NaN */ 75 /* not enabled convert to a quiet NaN */
76 DPMANT(r) &= (~DP_MBIT(DP_MBITS-1)); 76 DPMANT(r) &= (~DP_MBIT(DP_FBITS-1));
77 if (ieee754dp_isnan(r)) 77 if (ieee754dp_isnan(r))
78 return r; 78 return r;
79 else 79 else
@@ -136,7 +136,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
136{ 136{
137 assert(xm); /* we don't gen exact zeros (probably should) */ 137 assert(xm); /* we don't gen exact zeros (probably should) */
138 138
139 assert((xm >> (DP_MBITS + 1 + 3)) == 0); /* no execess */ 139 assert((xm >> (DP_FBITS + 1 + 3)) == 0); /* no execess */
140 assert(xm & (DP_HIDDEN_BIT << 3)); 140 assert(xm & (DP_HIDDEN_BIT << 3));
141 141
142 if (xe < DP_EMIN) { 142 if (xe < DP_EMIN) {
@@ -165,7 +165,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
165 } 165 }
166 166
167 if (xe == DP_EMIN - 1 167 if (xe == DP_EMIN - 1
168 && get_rounding(sn, xm) >> (DP_MBITS + 1 + 3)) 168 && get_rounding(sn, xm) >> (DP_FBITS + 1 + 3))
169 { 169 {
170 /* Not tiny after rounding */ 170 /* Not tiny after rounding */
171 ieee754_setcx(IEEE754_INEXACT); 171 ieee754_setcx(IEEE754_INEXACT);
@@ -195,7 +195,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
195 xm = get_rounding(sn, xm); 195 xm = get_rounding(sn, xm);
196 /* adjust exponent for rounding add overflowing 196 /* adjust exponent for rounding add overflowing
197 */ 197 */
198 if (xm >> (DP_MBITS + 3 + 1)) { 198 if (xm >> (DP_FBITS + 3 + 1)) {
199 /* add causes mantissa overflow */ 199 /* add causes mantissa overflow */
200 xm >>= 1; 200 xm >>= 1;
201 xe++; 201 xe++;
@@ -204,7 +204,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
204 /* strip grs bits */ 204 /* strip grs bits */
205 xm >>= 3; 205 xm >>= 3;
206 206
207 assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */ 207 assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */
208 assert(xe >= DP_EMIN); 208 assert(xe >= DP_EMIN);
209 209
210 if (xe > DP_EMAX) { 210 if (xe > DP_EMAX) {
@@ -237,7 +237,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
237 ieee754_setcx(IEEE754_UNDERFLOW); 237 ieee754_setcx(IEEE754_UNDERFLOW);
238 return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm); 238 return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm);
239 } else { 239 } else {
240 assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */ 240 assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */
241 assert(xm & DP_HIDDEN_BIT); 241 assert(xm & DP_HIDDEN_BIT);
242 242
243 return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT); 243 return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT);
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index 1dc205880cba..f8f358a9072c 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -32,7 +32,7 @@
32 32
33/* 3bit extended double precision sticky right shift */ 33/* 3bit extended double precision sticky right shift */
34#define XDPSRS(v,rs) \ 34#define XDPSRS(v,rs) \
35 ((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0)) 35 ((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
36 36
37#define XDPSRSX1() \ 37#define XDPSRSX1() \
38 (xe++, (xm = (xm >> 1) | (xm & 1))) 38 (xe++, (xm = (xm >> 1) | (xm & 1)))
@@ -42,7 +42,7 @@
42 42
43/* convert denormal to normalized with extended exponent */ 43/* convert denormal to normalized with extended exponent */
44#define DPDNORMx(m,e) \ 44#define DPDNORMx(m,e) \
45 while ((m >> DP_MBITS) == 0) { m <<= 1; e--; } 45 while ((m >> DP_FBITS) == 0) { m <<= 1; e--; }
46#define DPDNORMX DPDNORMx(xm, xe) 46#define DPDNORMX DPDNORMx(xm, xe)
47#define DPDNORMY DPDNORMx(ym, ye) 47#define DPDNORMY DPDNORMx(ym, ye)
48 48
@@ -53,7 +53,7 @@ static inline union ieee754dp builddp(int s, int bx, u64 m)
53 assert((s) == 0 || (s) == 1); 53 assert((s) == 0 || (s) == 1);
54 assert((bx) >= DP_EMIN - 1 + DP_EBIAS 54 assert((bx) >= DP_EMIN - 1 + DP_EBIAS
55 && (bx) <= DP_EMAX + 1 + DP_EBIAS); 55 && (bx) <= DP_EMAX + 1 + DP_EBIAS);
56 assert(((m) >> DP_MBITS) == 0); 56 assert(((m) >> DP_FBITS) == 0);
57 57
58 r.parts.sign = s; 58 r.parts.sign = s;
59 r.parts.bexp = bx; 59 r.parts.bexp = bx;
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 39c40d275825..543e8f0b5a97 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -31,19 +31,19 @@
31#define DP_EBIAS 1023 31#define DP_EBIAS 1023
32#define DP_EMIN (-1022) 32#define DP_EMIN (-1022)
33#define DP_EMAX 1023 33#define DP_EMAX 1023
34#define DP_MBITS 52 34#define DP_FBITS 52
35 35
36#define SP_EBIAS 127 36#define SP_EBIAS 127
37#define SP_EMIN (-126) 37#define SP_EMIN (-126)
38#define SP_EMAX 127 38#define SP_EMAX 127
39#define SP_MBITS 23 39#define SP_FBITS 23
40 40
41#define DP_MBIT(x) ((u64)1 << (x)) 41#define DP_MBIT(x) ((u64)1 << (x))
42#define DP_HIDDEN_BIT DP_MBIT(DP_MBITS) 42#define DP_HIDDEN_BIT DP_MBIT(DP_FBITS)
43#define DP_SIGN_BIT DP_MBIT(63) 43#define DP_SIGN_BIT DP_MBIT(63)
44 44
45#define SP_MBIT(x) ((u32)1 << (x)) 45#define SP_MBIT(x) ((u32)1 << (x))
46#define SP_HIDDEN_BIT SP_MBIT(SP_MBITS) 46#define SP_HIDDEN_BIT SP_MBIT(SP_FBITS)
47#define SP_SIGN_BIT SP_MBIT(31) 47#define SP_SIGN_BIT SP_MBIT(31)
48 48
49 49
@@ -94,7 +94,7 @@ static inline int ieee754_tstx(void)
94 if (ve == SP_EMAX+1+SP_EBIAS) { \ 94 if (ve == SP_EMAX+1+SP_EBIAS) { \
95 if (vm == 0) \ 95 if (vm == 0) \
96 vc = IEEE754_CLASS_INF; \ 96 vc = IEEE754_CLASS_INF; \
97 else if (vm & SP_MBIT(SP_MBITS-1)) \ 97 else if (vm & SP_MBIT(SP_FBITS-1)) \
98 vc = IEEE754_CLASS_SNAN; \ 98 vc = IEEE754_CLASS_SNAN; \
99 else \ 99 else \
100 vc = IEEE754_CLASS_QNAN; \ 100 vc = IEEE754_CLASS_QNAN; \
@@ -128,7 +128,7 @@ static inline int ieee754_tstx(void)
128 if (ve == DP_EMAX+1+DP_EBIAS) { \ 128 if (ve == DP_EMAX+1+DP_EBIAS) { \
129 if (vm == 0) \ 129 if (vm == 0) \
130 vc = IEEE754_CLASS_INF; \ 130 vc = IEEE754_CLASS_INF; \
131 else if (vm & DP_MBIT(DP_MBITS-1)) \ 131 else if (vm & DP_MBIT(DP_FBITS-1)) \
132 vc = IEEE754_CLASS_SNAN; \ 132 vc = IEEE754_CLASS_SNAN; \
133 else \ 133 else \
134 vc = IEEE754_CLASS_QNAN; \ 134 vc = IEEE754_CLASS_QNAN; \
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index ed62ffeeb61e..5b435ec8ae25 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -43,7 +43,7 @@ int ieee754sp_isnan(union ieee754sp x)
43int ieee754sp_issnan(union ieee754sp x) 43int ieee754sp_issnan(union ieee754sp x)
44{ 44{
45 assert(ieee754sp_isnan(x)); 45 assert(ieee754sp_isnan(x));
46 return (SPMANT(x) & SP_MBIT(SP_MBITS-1)); 46 return (SPMANT(x) & SP_MBIT(SP_FBITS-1));
47} 47}
48 48
49 49
@@ -74,7 +74,7 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r, const char *op, ...)
74 74
75 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) { 75 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
76 /* not enabled convert to a quiet NaN */ 76 /* not enabled convert to a quiet NaN */
77 SPMANT(r) &= (~SP_MBIT(SP_MBITS-1)); 77 SPMANT(r) &= (~SP_MBIT(SP_FBITS-1));
78 if (ieee754sp_isnan(r)) 78 if (ieee754sp_isnan(r))
79 return r; 79 return r;
80 else 80 else
@@ -137,7 +137,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
137{ 137{
138 assert(xm); /* we don't gen exact zeros (probably should) */ 138 assert(xm); /* we don't gen exact zeros (probably should) */
139 139
140 assert((xm >> (SP_MBITS + 1 + 3)) == 0); /* no execess */ 140 assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no execess */
141 assert(xm & (SP_HIDDEN_BIT << 3)); 141 assert(xm & (SP_HIDDEN_BIT << 3));
142 142
143 if (xe < SP_EMIN) { 143 if (xe < SP_EMIN) {
@@ -166,7 +166,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
166 } 166 }
167 167
168 if (xe == SP_EMIN - 1 168 if (xe == SP_EMIN - 1
169 && get_rounding(sn, xm) >> (SP_MBITS + 1 + 3)) 169 && get_rounding(sn, xm) >> (SP_FBITS + 1 + 3))
170 { 170 {
171 /* Not tiny after rounding */ 171 /* Not tiny after rounding */
172 ieee754_setcx(IEEE754_INEXACT); 172 ieee754_setcx(IEEE754_INEXACT);
@@ -194,7 +194,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
194 xm = get_rounding(sn, xm); 194 xm = get_rounding(sn, xm);
195 /* adjust exponent for rounding add overflowing 195 /* adjust exponent for rounding add overflowing
196 */ 196 */
197 if (xm >> (SP_MBITS + 1 + 3)) { 197 if (xm >> (SP_FBITS + 1 + 3)) {
198 /* add causes mantissa overflow */ 198 /* add causes mantissa overflow */
199 xm >>= 1; 199 xm >>= 1;
200 xe++; 200 xe++;
@@ -203,7 +203,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
203 /* strip grs bits */ 203 /* strip grs bits */
204 xm >>= 3; 204 xm >>= 3;
205 205
206 assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */ 206 assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
207 assert(xe >= SP_EMIN); 207 assert(xe >= SP_EMIN);
208 208
209 if (xe > SP_EMAX) { 209 if (xe > SP_EMAX) {
@@ -236,7 +236,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
236 ieee754_setcx(IEEE754_UNDERFLOW); 236 ieee754_setcx(IEEE754_UNDERFLOW);
237 return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm); 237 return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm);
238 } else { 238 } else {
239 assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */ 239 assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
240 assert(xm & SP_HIDDEN_BIT); 240 assert(xm & SP_HIDDEN_BIT);
241 241
242 return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT); 242 return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT);
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index 011d034fd86e..075ea1891280 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -33,21 +33,21 @@
33/* 3bit extended single precision sticky right shift */ 33/* 3bit extended single precision sticky right shift */
34#define SPXSRSXn(rs) \ 34#define SPXSRSXn(rs) \
35 (xe += rs, \ 35 (xe += rs, \
36 xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0)) 36 xm = (rs > (SP_FBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0))
37 37
38#define SPXSRSX1() \ 38#define SPXSRSX1() \
39 (xe++, (xm = (xm >> 1) | (xm & 1))) 39 (xe++, (xm = (xm >> 1) | (xm & 1)))
40 40
41#define SPXSRSYn(rs) \ 41#define SPXSRSYn(rs) \
42 (ye+=rs, \ 42 (ye+=rs, \
43 ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0)) 43 ym = (rs > (SP_FBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0))
44 44
45#define SPXSRSY1() \ 45#define SPXSRSY1() \
46 (ye++, (ym = (ym >> 1) | (ym & 1))) 46 (ye++, (ym = (ym >> 1) | (ym & 1)))
47 47
48/* convert denormal to normalized with extended exponent */ 48/* convert denormal to normalized with extended exponent */
49#define SPDNORMx(m,e) \ 49#define SPDNORMx(m,e) \
50 while ((m >> SP_MBITS) == 0) { m <<= 1; e--; } 50 while ((m >> SP_FBITS) == 0) { m <<= 1; e--; }
51#define SPDNORMX SPDNORMx(xm, xe) 51#define SPDNORMX SPDNORMx(xm, xe)
52#define SPDNORMY SPDNORMx(ym, ye) 52#define SPDNORMY SPDNORMx(ym, ye)
53 53
@@ -58,7 +58,7 @@ static inline union ieee754sp buildsp(int s, int bx, unsigned m)
58 assert((s) == 0 || (s) == 1); 58 assert((s) == 0 || (s) == 1);
59 assert((bx) >= SP_EMIN - 1 + SP_EBIAS 59 assert((bx) >= SP_EMIN - 1 + SP_EBIAS
60 && (bx) <= SP_EMAX + 1 + SP_EBIAS); 60 && (bx) <= SP_EMAX + 1 + SP_EBIAS);
61 assert(((m) >> SP_MBITS) == 0); 61 assert(((m) >> SP_FBITS) == 0);
62 62
63 r.parts.sign = s; 63 r.parts.sign = s;
64 r.parts.bexp = bx; 64 r.parts.bexp = bx;
diff --git a/arch/mips/math-emu/sp_add.c b/arch/mips/math-emu/sp_add.c
index e67f11af4acf..d107bce38bfd 100644
--- a/arch/mips/math-emu/sp_add.c
+++ b/arch/mips/math-emu/sp_add.c
@@ -148,7 +148,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
148 xe = xe; 148 xe = xe;
149 xs = xs; 149 xs = xs;
150 150
151 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ 151 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
152 SPXSRSX1(); 152 SPXSRSX1();
153 } 153 }
154 } else { 154 } else {
@@ -166,7 +166,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
166 IEEE754_RD); 166 IEEE754_RD);
167 167
168 /* normalize in extended single precision */ 168 /* normalize in extended single precision */
169 while ((xm >> (SP_MBITS + 3)) == 0) { 169 while ((xm >> (SP_FBITS + 3)) == 0) {
170 xm <<= 1; 170 xm <<= 1;
171 xe--; 171 xe--;
172 } 172 }
diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c
index 4caac973e2a6..095fb20262a9 100644
--- a/arch/mips/math-emu/sp_div.c
+++ b/arch/mips/math-emu/sp_div.c
@@ -129,7 +129,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
129 int re = xe - ye; 129 int re = xe - ye;
130 unsigned bm; 130 unsigned bm;
131 131
132 for (bm = SP_MBIT(SP_MBITS + 2); bm; bm >>= 1) { 132 for (bm = SP_MBIT(SP_FBITS + 2); bm; bm >>= 1) {
133 if (xm >= ym) { 133 if (xm >= ym) {
134 xm -= ym; 134 xm -= ym;
135 rm |= bm; 135 rm |= bm;
@@ -146,7 +146,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
146 146
147 /* normalise rm to rounding precision ? 147 /* normalise rm to rounding precision ?
148 */ 148 */
149 while ((rm >> (SP_MBITS + 3)) == 0) { 149 while ((rm >> (SP_FBITS + 3)) == 0) {
150 rm <<= 1; 150 rm <<= 1;
151 re--; 151 re--;
152 } 152 }
diff --git a/arch/mips/math-emu/sp_fdp.c b/arch/mips/math-emu/sp_fdp.c
index 569878d7cb98..c22ffcac2651 100644
--- a/arch/mips/math-emu/sp_fdp.c
+++ b/arch/mips/math-emu/sp_fdp.c
@@ -43,7 +43,7 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
43 return ieee754sp_nanxcpt(ieee754sp_indef(), "fdp"); 43 return ieee754sp_nanxcpt(ieee754sp_indef(), "fdp");
44 case IEEE754_CLASS_QNAN: 44 case IEEE754_CLASS_QNAN:
45 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32) 45 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32)
46 (xm >> (DP_MBITS - SP_MBITS))); 46 (xm >> (DP_FBITS - SP_FBITS)));
47 if (!ieee754sp_isnan(nan)) 47 if (!ieee754sp_isnan(nan))
48 nan = ieee754sp_indef(); 48 nan = ieee754sp_indef();
49 return ieee754sp_nanxcpt(nan, "fdp", x); 49 return ieee754sp_nanxcpt(nan, "fdp", x);
@@ -66,10 +66,10 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
66 { 66 {
67 u32 rm; 67 u32 rm;
68 68
69 /* convert from DP_MBITS to SP_MBITS+3 with sticky right shift 69 /* convert from DP_FBITS to SP_FBITS+3 with sticky right shift
70 */ 70 */
71 rm = (xm >> (DP_MBITS - (SP_MBITS + 3))) | 71 rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
72 ((xm << (64 - (DP_MBITS - (SP_MBITS + 3)))) != 0); 72 ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
73 73
74 SPNORMRET1(xs, xe, rm, "fdp", x); 74 SPNORMRET1(xs, xe, rm, "fdp", x);
75 } 75 }
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index 74619e73796c..9574d25f6122 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -50,18 +50,18 @@ union ieee754sp ieee754sp_fint(int x)
50 } else { 50 } else {
51 xm = x; 51 xm = x;
52 } 52 }
53 xe = SP_MBITS + 3; 53 xe = SP_FBITS + 3;
54 54
55 if (xm >> (SP_MBITS + 1 + 3)) { 55 if (xm >> (SP_FBITS + 1 + 3)) {
56 /* shunt out overflow bits 56 /* shunt out overflow bits
57 */ 57 */
58 while (xm >> (SP_MBITS + 1 + 3)) { 58 while (xm >> (SP_FBITS + 1 + 3)) {
59 SPXSRSX1(); 59 SPXSRSX1();
60 } 60 }
61 } else { 61 } else {
62 /* normalize in grs extended single precision 62 /* normalize in grs extended single precision
63 */ 63 */
64 while ((xm >> (SP_MBITS + 3)) == 0) { 64 while ((xm >> (SP_FBITS + 3)) == 0) {
65 xm <<= 1; 65 xm <<= 1;
66 xe--; 66 xe--;
67 } 67 }
diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c
index ea065ae14766..65c7e7e67b60 100644
--- a/arch/mips/math-emu/sp_flong.c
+++ b/arch/mips/math-emu/sp_flong.c
@@ -50,17 +50,17 @@ union ieee754sp ieee754sp_flong(s64 x)
50 } else { 50 } else {
51 xm = x; 51 xm = x;
52 } 52 }
53 xe = SP_MBITS + 3; 53 xe = SP_FBITS + 3;
54 54
55 if (xm >> (SP_MBITS + 1 + 3)) { 55 if (xm >> (SP_FBITS + 1 + 3)) {
56 /* shunt out overflow bits 56 /* shunt out overflow bits
57 */ 57 */
58 while (xm >> (SP_MBITS + 1 + 3)) { 58 while (xm >> (SP_FBITS + 1 + 3)) {
59 SPXSRSX1(); 59 SPXSRSX1();
60 } 60 }
61 } else { 61 } else {
62 /* normalize in grs extended single precision */ 62 /* normalize in grs extended single precision */
63 while ((xm >> (SP_MBITS + 3)) == 0) { 63 while ((xm >> (SP_FBITS + 3)) == 0) {
64 xm <<= 1; 64 xm <<= 1;
65 xe--; 65 xe--;
66 } 66 }
diff --git a/arch/mips/math-emu/sp_modf.c b/arch/mips/math-emu/sp_modf.c
index 22f19a22ab02..5f361a7a10b6 100644
--- a/arch/mips/math-emu/sp_modf.c
+++ b/arch/mips/math-emu/sp_modf.c
@@ -54,24 +54,24 @@ union ieee754sp ieee754sp_modf(union ieee754sp x, union ieee754sp *ip)
54 *ip = ieee754sp_zero(xs); 54 *ip = ieee754sp_zero(xs);
55 return x; 55 return x;
56 } 56 }
57 if (xe >= SP_MBITS) { 57 if (xe >= SP_FBITS) {
58 *ip = x; 58 *ip = x;
59 return ieee754sp_zero(xs); 59 return ieee754sp_zero(xs);
60 } 60 }
61 /* generate ipart mantissa by clearing bottom bits 61 /* generate ipart mantissa by clearing bottom bits
62 */ 62 */
63 *ip = buildsp(xs, xe + SP_EBIAS, 63 *ip = buildsp(xs, xe + SP_EBIAS,
64 ((xm >> (SP_MBITS - xe)) << (SP_MBITS - xe)) & 64 ((xm >> (SP_FBITS - xe)) << (SP_FBITS - xe)) &
65 ~SP_HIDDEN_BIT); 65 ~SP_HIDDEN_BIT);
66 66
67 /* generate fpart mantissa by clearing top bits 67 /* generate fpart mantissa by clearing top bits
68 * and normalizing (must be able to normalize) 68 * and normalizing (must be able to normalize)
69 */ 69 */
70 xm = (xm << (32 - (SP_MBITS - xe))) >> (32 - (SP_MBITS - xe)); 70 xm = (xm << (32 - (SP_FBITS - xe))) >> (32 - (SP_FBITS - xe));
71 if (xm == 0) 71 if (xm == 0)
72 return ieee754sp_zero(xs); 72 return ieee754sp_zero(xs);
73 73
74 while ((xm >> SP_MBITS) == 0) { 74 while ((xm >> SP_FBITS) == 0) {
75 xm <<= 1; 75 xm <<= 1;
76 xe--; 76 xe--;
77 } 77 }
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c
index 844b3bde0ab6..28f608f25499 100644
--- a/arch/mips/math-emu/sp_mul.c
+++ b/arch/mips/math-emu/sp_mul.c
@@ -114,8 +114,8 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
114 unsigned rm; 114 unsigned rm;
115 115
116 /* shunt to top of word */ 116 /* shunt to top of word */
117 xm <<= 32 - (SP_MBITS + 1); 117 xm <<= 32 - (SP_FBITS + 1);
118 ym <<= 32 - (SP_MBITS + 1); 118 ym <<= 32 - (SP_FBITS + 1);
119 119
120 /* multiply 32bits xm,ym to give high 32bits rm with stickness 120 /* multiply 32bits xm,ym to give high 32bits rm with stickness
121 */ 121 */
@@ -156,12 +156,12 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
156 * sticky shift down to normal rounding precision 156 * sticky shift down to normal rounding precision
157 */ 157 */
158 if ((int) rm < 0) { 158 if ((int) rm < 0) {
159 rm = (rm >> (32 - (SP_MBITS + 1 + 3))) | 159 rm = (rm >> (32 - (SP_FBITS + 1 + 3))) |
160 ((rm << (SP_MBITS + 1 + 3)) != 0); 160 ((rm << (SP_FBITS + 1 + 3)) != 0);
161 re++; 161 re++;
162 } else { 162 } else {
163 rm = (rm >> (32 - (SP_MBITS + 1 + 3 + 1))) | 163 rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) |
164 ((rm << (SP_MBITS + 1 + 3 + 1)) != 0); 164 ((rm << (SP_FBITS + 1 + 3 + 1)) != 0);
165 } 165 }
166 assert(rm & (SP_HIDDEN_BIT << 3)); 166 assert(rm & (SP_HIDDEN_BIT << 3));
167 167
diff --git a/arch/mips/math-emu/sp_sub.c b/arch/mips/math-emu/sp_sub.c
index 7e45ba3c2a38..1131065d0178 100644
--- a/arch/mips/math-emu/sp_sub.c
+++ b/arch/mips/math-emu/sp_sub.c
@@ -153,7 +153,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
153 xe = xe; 153 xe = xe;
154 xs = xs; 154 xs = xs;
155 155
156 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ 156 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
157 SPXSRSX1(); /* shift preserving sticky */ 157 SPXSRSX1(); /* shift preserving sticky */
158 } 158 }
159 } else { 159 } else {
@@ -174,7 +174,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
174 } 174 }
175 /* normalize to rounding precision 175 /* normalize to rounding precision
176 */ 176 */
177 while ((xm >> (SP_MBITS + 3)) == 0) { 177 while ((xm >> (SP_FBITS + 3)) == 0) {
178 xm <<= 1; 178 xm <<= 1;
179 xe--; 179 xe--;
180 } 180 }
diff --git a/arch/mips/math-emu/sp_tint.c b/arch/mips/math-emu/sp_tint.c
index febcf5cc4fbc..709f6bcd490b 100644
--- a/arch/mips/math-emu/sp_tint.c
+++ b/arch/mips/math-emu/sp_tint.c
@@ -57,8 +57,8 @@ int ieee754sp_tint(union ieee754sp x)
57 return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x); 57 return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x);
58 } 58 }
59 /* oh gawd */ 59 /* oh gawd */
60 if (xe > SP_MBITS) { 60 if (xe > SP_FBITS) {
61 xm <<= xe - SP_MBITS; 61 xm <<= xe - SP_FBITS;
62 } else { 62 } else {
63 u32 residue; 63 u32 residue;
64 int round; 64 int round;
@@ -75,10 +75,10 @@ int ieee754sp_tint(union ieee754sp x)
75 * so we do it in two steps. Be aware that xe 75 * so we do it in two steps. Be aware that xe
76 * may be -1 */ 76 * may be -1 */
77 residue = xm << (xe + 1); 77 residue = xm << (xe + 1);
78 residue <<= 31 - SP_MBITS; 78 residue <<= 31 - SP_FBITS;
79 round = (residue >> 31) != 0; 79 round = (residue >> 31) != 0;
80 sticky = (residue << 1) != 0; 80 sticky = (residue << 1) != 0;
81 xm >>= SP_MBITS - xe; 81 xm >>= SP_FBITS - xe;
82 } 82 }
83 odd = (xm & 0x1) != 0x0; 83 odd = (xm & 0x1) != 0x0;
84 switch (ieee754_csr.rm) { 84 switch (ieee754_csr.rm) {
diff --git a/arch/mips/math-emu/sp_tlong.c b/arch/mips/math-emu/sp_tlong.c
index a05d09318fb1..155491f85d7f 100644
--- a/arch/mips/math-emu/sp_tlong.c
+++ b/arch/mips/math-emu/sp_tlong.c
@@ -57,9 +57,9 @@ s64 ieee754sp_tlong(union ieee754sp x)
57 return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x); 57 return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x);
58 } 58 }
59 /* oh gawd */ 59 /* oh gawd */
60 if (xe > SP_MBITS) { 60 if (xe > SP_FBITS) {
61 xm <<= xe - SP_MBITS; 61 xm <<= xe - SP_FBITS;
62 } else if (xe < SP_MBITS) { 62 } else if (xe < SP_FBITS) {
63 u32 residue; 63 u32 residue;
64 int round; 64 int round;
65 int sticky; 65 int sticky;
@@ -71,10 +71,10 @@ s64 ieee754sp_tlong(union ieee754sp x)
71 sticky = residue != 0; 71 sticky = residue != 0;
72 xm = 0; 72 xm = 0;
73 } else { 73 } else {
74 residue = xm << (32 - SP_MBITS + xe); 74 residue = xm << (32 - SP_FBITS + xe);
75 round = (residue >> 31) != 0; 75 round = (residue >> 31) != 0;
76 sticky = (residue << 1) != 0; 76 sticky = (residue << 1) != 0;
77 xm >>= SP_MBITS - xe; 77 xm >>= SP_FBITS - xe;
78 } 78 }
79 odd = (xm & 0x1) != 0x0; 79 odd = (xm & 0x1) != 0x0;
80 switch (ieee754_csr.rm) { 80 switch (ieee754_csr.rm) {