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-rw-r--r--arch/mips/loongson/common/bonito-irq.c5
-rw-r--r--arch/mips/loongson/common/init.c8
-rw-r--r--arch/mips/loongson/common/mem.c33
-rw-r--r--arch/mips/loongson/common/pci.c8
4 files changed, 45 insertions, 9 deletions
diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
index a1cbd110a6e4..2dc2a4cc632a 100644
--- a/arch/mips/loongson/common/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -12,6 +12,7 @@
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/compiler.h>
15 16
16#include <loongson.h> 17#include <loongson.h>
17 18
@@ -35,7 +36,7 @@ static struct irq_chip bonito_irq_type = {
35 .unmask = bonito_irq_enable, 36 .unmask = bonito_irq_enable,
36}; 37};
37 38
38static struct irqaction dma_timeout_irqaction = { 39static struct irqaction __maybe_unused dma_timeout_irqaction = {
39 .handler = no_action, 40 .handler = no_action,
40 .name = "dma_timeout", 41 .name = "dma_timeout",
41}; 42};
@@ -47,5 +48,7 @@ void bonito_irq_init(void)
47 for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) 48 for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++)
48 set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); 49 set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
49 50
51#ifdef CONFIG_CPU_LOONGSON2E
50 setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); 52 setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction);
53#endif
51} 54}
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
index 3b1dbc1ca242..743d3571f010 100644
--- a/arch/mips/loongson/common/init.c
+++ b/arch/mips/loongson/common/init.c
@@ -12,12 +12,20 @@
12 12
13#include <loongson.h> 13#include <loongson.h>
14 14
15/* Loongson CPU address windows config space base address */
16unsigned long __maybe_unused _loongson_addrwincfg_base;
17
15void __init prom_init(void) 18void __init prom_init(void)
16{ 19{
17 /* init base address of io space */ 20 /* init base address of io space */
18 set_io_port_base((unsigned long) 21 set_io_port_base((unsigned long)
19 ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); 22 ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
20 23
24#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
25 _loongson_addrwincfg_base = (unsigned long)
26 ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE);
27#endif
28
21 prom_init_cmdline(); 29 prom_init_cmdline();
22 prom_init_env(); 30 prom_init_env();
23 prom_init_memory(); 31 prom_init_memory();
diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c
index 3f7f153b1974..e93551dbc9ea 100644
--- a/arch/mips/loongson/common/mem.c
+++ b/arch/mips/loongson/common/mem.c
@@ -21,14 +21,31 @@ void __init prom_init_memory(void)
21 add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << 21 add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize <<
22 20), BOOT_MEM_RESERVED); 22 20), BOOT_MEM_RESERVED);
23#ifdef CONFIG_64BIT 23#ifdef CONFIG_64BIT
24 if (highmemsize > 0) 24#ifdef CONFIG_CPU_LOONGSON2F
25 add_memory_region(LOONGSON_HIGHMEM_START, 25 {
26 highmemsize << 20, BOOT_MEM_RAM); 26 int bit;
27 27
28 add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START - 28 bit = fls(memsize + highmemsize);
29 LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED); 29 if (bit != ffs(memsize + highmemsize))
30 30 bit += 20;
31#endif /* CONFIG_64BIT */ 31 else
32 bit = bit + 20 - 1;
33
34 /* set cpu window3 to map CPU to DDR: 2G -> 2G */
35 LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul,
36 0x80000000ul, (1 << bit));
37 mmiowb();
38 }
39#endif /* CONFIG_CPU_LOONGSON2F */
40
41 if (highmemsize > 0)
42 add_memory_region(LOONGSON_HIGHMEM_START,
43 highmemsize << 20, BOOT_MEM_RAM);
44
45 add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START -
46 LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED);
47
48#endif /* CONFIG_64BIT */
32} 49}
33 50
34/* override of arch/mips/mm/cache.c: __uncached_access */ 51/* override of arch/mips/mm/cache.c: __uncached_access */
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c
index a7eb8b9c44ee..eac43b8f695e 100644
--- a/arch/mips/loongson/common/pci.c
+++ b/arch/mips/loongson/common/pci.c
@@ -67,6 +67,14 @@ static void __init setup_pcimap(void)
67 /* can not change gnt to break pci transfer when device's gnt not 67 /* can not change gnt to break pci transfer when device's gnt not
68 deassert for some broken device */ 68 deassert for some broken device */
69 LOONGSON_PXARB_CFG = 0x00fe0105ul; 69 LOONGSON_PXARB_CFG = 0x00fe0105ul;
70
71#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
72 /*
73 * set cpu addr window2 to map CPU address space to PCI address space
74 */
75 LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
76 LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
77#endif
70} 78}
71 79
72static int __init pcibios_init(void) 80static int __init pcibios_init(void)