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Diffstat (limited to 'arch/mips/loongson/lemote-2f/irq.c')
-rw-r--r--arch/mips/loongson/lemote-2f/irq.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c
index 1d8b4d28a058..081db102bb98 100644
--- a/arch/mips/loongson/lemote-2f/irq.c
+++ b/arch/mips/loongson/lemote-2f/irq.c
@@ -19,7 +19,6 @@
19#include <machine.h> 19#include <machine.h>
20 20
21#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ 21#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */
22#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
23#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ 22#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */
24#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ 23#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */
25#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */ 24#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */
@@ -79,9 +78,7 @@ void mach_irq_dispatch(unsigned int pending)
79 if (pending & CAUSEF_IP7) 78 if (pending & CAUSEF_IP7)
80 do_IRQ(LOONGSON_TIMER_IRQ); 79 do_IRQ(LOONGSON_TIMER_IRQ);
81 else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */ 80 else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */
82#if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE) 81 do_perfcnt_IRQ();
83 do_IRQ(LOONGSON2_PERFCNT_IRQ);
84#endif
85 bonito_irqdispatch(); 82 bonito_irqdispatch();
86 } else if (pending & CAUSEF_IP3) /* CPU UART */ 83 } else if (pending & CAUSEF_IP3) /* CPU UART */
87 do_IRQ(LOONGSON_UART_IRQ); 84 do_IRQ(LOONGSON_UART_IRQ);
@@ -91,13 +88,6 @@ void mach_irq_dispatch(unsigned int pending)
91 spurious_interrupt(); 88 spurious_interrupt();
92} 89}
93 90
94void __init set_irq_trigger_mode(void)
95{
96 /* setup cs5536 as high level trigger */
97 LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
98 LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
99}
100
101static irqreturn_t ip6_action(int cpl, void *dev_id) 91static irqreturn_t ip6_action(int cpl, void *dev_id)
102{ 92{
103 return IRQ_HANDLED; 93 return IRQ_HANDLED;
@@ -122,6 +112,10 @@ void __init mach_init_irq(void)
122 * 32-63 ------> bonito irq 112 * 32-63 ------> bonito irq
123 */ 113 */
124 114
115 /* setup cs5536 as high level trigger */
116 LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
117 LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
118
125 /* Sets the first-level interrupt dispatcher. */ 119 /* Sets the first-level interrupt dispatcher. */
126 mips_cpu_irq_init(); 120 mips_cpu_irq_init();
127 init_i8259_irqs(); 121 init_i8259_irqs();