diff options
Diffstat (limited to 'arch/mips/loongson/lemote-2f/ec_kb3310b.h')
-rw-r--r-- | arch/mips/loongson/lemote-2f/ec_kb3310b.h | 216 |
1 files changed, 108 insertions, 108 deletions
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.h b/arch/mips/loongson/lemote-2f/ec_kb3310b.h index 1595a21b315b..5a3f1860d4d2 100644 --- a/arch/mips/loongson/lemote-2f/ec_kb3310b.h +++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.h | |||
@@ -30,141 +30,141 @@ extern sci_handler yeeloong_report_lid_status; | |||
30 | * 2, fill the PORT_LOW as EC register low part. | 30 | * 2, fill the PORT_LOW as EC register low part. |
31 | * 3, fill the PORT_DATA as EC register write data or get the data from it. | 31 | * 3, fill the PORT_DATA as EC register write data or get the data from it. |
32 | */ | 32 | */ |
33 | #define EC_IO_PORT_HIGH 0x0381 | 33 | #define EC_IO_PORT_HIGH 0x0381 |
34 | #define EC_IO_PORT_LOW 0x0382 | 34 | #define EC_IO_PORT_LOW 0x0382 |
35 | #define EC_IO_PORT_DATA 0x0383 | 35 | #define EC_IO_PORT_DATA 0x0383 |
36 | 36 | ||
37 | /* | 37 | /* |
38 | * EC delay time is 500us for register and status access | 38 | * EC delay time is 500us for register and status access |
39 | */ | 39 | */ |
40 | #define EC_REG_DELAY 500 /* unit : us */ | 40 | #define EC_REG_DELAY 500 /* unit : us */ |
41 | #define EC_CMD_TIMEOUT 0x1000 | 41 | #define EC_CMD_TIMEOUT 0x1000 |
42 | 42 | ||
43 | /* | 43 | /* |
44 | * EC access port for SCI communication | 44 | * EC access port for SCI communication |
45 | */ | 45 | */ |
46 | #define EC_CMD_PORT 0x66 | 46 | #define EC_CMD_PORT 0x66 |
47 | #define EC_STS_PORT 0x66 | 47 | #define EC_STS_PORT 0x66 |
48 | #define EC_DAT_PORT 0x62 | 48 | #define EC_DAT_PORT 0x62 |
49 | #define CMD_INIT_IDLE_MODE 0xdd | 49 | #define CMD_INIT_IDLE_MODE 0xdd |
50 | #define CMD_EXIT_IDLE_MODE 0xdf | 50 | #define CMD_EXIT_IDLE_MODE 0xdf |
51 | #define CMD_INIT_RESET_MODE 0xd8 | 51 | #define CMD_INIT_RESET_MODE 0xd8 |
52 | #define CMD_REBOOT_SYSTEM 0x8c | 52 | #define CMD_REBOOT_SYSTEM 0x8c |
53 | #define CMD_GET_EVENT_NUM 0x84 | 53 | #define CMD_GET_EVENT_NUM 0x84 |
54 | #define CMD_PROGRAM_PIECE 0xda | 54 | #define CMD_PROGRAM_PIECE 0xda |
55 | 55 | ||
56 | /* temperature & fan registers */ | 56 | /* temperature & fan registers */ |
57 | #define REG_TEMPERATURE_VALUE 0xF458 | 57 | #define REG_TEMPERATURE_VALUE 0xF458 |
58 | #define REG_FAN_AUTO_MAN_SWITCH 0xF459 | 58 | #define REG_FAN_AUTO_MAN_SWITCH 0xF459 |
59 | #define BIT_FAN_AUTO 0 | 59 | #define BIT_FAN_AUTO 0 |
60 | #define BIT_FAN_MANUAL 1 | 60 | #define BIT_FAN_MANUAL 1 |
61 | #define REG_FAN_CONTROL 0xF4D2 | 61 | #define REG_FAN_CONTROL 0xF4D2 |
62 | #define BIT_FAN_CONTROL_ON (1 << 0) | 62 | #define BIT_FAN_CONTROL_ON (1 << 0) |
63 | #define BIT_FAN_CONTROL_OFF (0 << 0) | 63 | #define BIT_FAN_CONTROL_OFF (0 << 0) |
64 | #define REG_FAN_STATUS 0xF4DA | 64 | #define REG_FAN_STATUS 0xF4DA |
65 | #define BIT_FAN_STATUS_ON (1 << 0) | 65 | #define BIT_FAN_STATUS_ON (1 << 0) |
66 | #define BIT_FAN_STATUS_OFF (0 << 0) | 66 | #define BIT_FAN_STATUS_OFF (0 << 0) |
67 | #define REG_FAN_SPEED_HIGH 0xFE22 | 67 | #define REG_FAN_SPEED_HIGH 0xFE22 |
68 | #define REG_FAN_SPEED_LOW 0xFE23 | 68 | #define REG_FAN_SPEED_LOW 0xFE23 |
69 | #define REG_FAN_SPEED_LEVEL 0xF4CC | 69 | #define REG_FAN_SPEED_LEVEL 0xF4CC |
70 | /* fan speed divider */ | 70 | /* fan speed divider */ |
71 | #define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ | 71 | #define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ |
72 | 72 | ||
73 | /* battery registers */ | 73 | /* battery registers */ |
74 | #define REG_BAT_DESIGN_CAP_HIGH 0xF77D | 74 | #define REG_BAT_DESIGN_CAP_HIGH 0xF77D |
75 | #define REG_BAT_DESIGN_CAP_LOW 0xF77E | 75 | #define REG_BAT_DESIGN_CAP_LOW 0xF77E |
76 | #define REG_BAT_FULLCHG_CAP_HIGH 0xF780 | 76 | #define REG_BAT_FULLCHG_CAP_HIGH 0xF780 |
77 | #define REG_BAT_FULLCHG_CAP_LOW 0xF781 | 77 | #define REG_BAT_FULLCHG_CAP_LOW 0xF781 |
78 | #define REG_BAT_DESIGN_VOL_HIGH 0xF782 | 78 | #define REG_BAT_DESIGN_VOL_HIGH 0xF782 |
79 | #define REG_BAT_DESIGN_VOL_LOW 0xF783 | 79 | #define REG_BAT_DESIGN_VOL_LOW 0xF783 |
80 | #define REG_BAT_CURRENT_HIGH 0xF784 | 80 | #define REG_BAT_CURRENT_HIGH 0xF784 |
81 | #define REG_BAT_CURRENT_LOW 0xF785 | 81 | #define REG_BAT_CURRENT_LOW 0xF785 |
82 | #define REG_BAT_VOLTAGE_HIGH 0xF786 | 82 | #define REG_BAT_VOLTAGE_HIGH 0xF786 |
83 | #define REG_BAT_VOLTAGE_LOW 0xF787 | 83 | #define REG_BAT_VOLTAGE_LOW 0xF787 |
84 | #define REG_BAT_TEMPERATURE_HIGH 0xF788 | 84 | #define REG_BAT_TEMPERATURE_HIGH 0xF788 |
85 | #define REG_BAT_TEMPERATURE_LOW 0xF789 | 85 | #define REG_BAT_TEMPERATURE_LOW 0xF789 |
86 | #define REG_BAT_RELATIVE_CAP_HIGH 0xF492 | 86 | #define REG_BAT_RELATIVE_CAP_HIGH 0xF492 |
87 | #define REG_BAT_RELATIVE_CAP_LOW 0xF493 | 87 | #define REG_BAT_RELATIVE_CAP_LOW 0xF493 |
88 | #define REG_BAT_VENDOR 0xF4C4 | 88 | #define REG_BAT_VENDOR 0xF4C4 |
89 | #define FLAG_BAT_VENDOR_SANYO 0x01 | 89 | #define FLAG_BAT_VENDOR_SANYO 0x01 |
90 | #define FLAG_BAT_VENDOR_SIMPLO 0x02 | 90 | #define FLAG_BAT_VENDOR_SIMPLO 0x02 |
91 | #define REG_BAT_CELL_COUNT 0xF4C6 | 91 | #define REG_BAT_CELL_COUNT 0xF4C6 |
92 | #define FLAG_BAT_CELL_3S1P 0x03 | 92 | #define FLAG_BAT_CELL_3S1P 0x03 |
93 | #define FLAG_BAT_CELL_3S2P 0x06 | 93 | #define FLAG_BAT_CELL_3S2P 0x06 |
94 | #define REG_BAT_CHARGE 0xF4A2 | 94 | #define REG_BAT_CHARGE 0xF4A2 |
95 | #define FLAG_BAT_CHARGE_DISCHARGE 0x01 | 95 | #define FLAG_BAT_CHARGE_DISCHARGE 0x01 |
96 | #define FLAG_BAT_CHARGE_CHARGE 0x02 | 96 | #define FLAG_BAT_CHARGE_CHARGE 0x02 |
97 | #define FLAG_BAT_CHARGE_ACPOWER 0x00 | 97 | #define FLAG_BAT_CHARGE_ACPOWER 0x00 |
98 | #define REG_BAT_STATUS 0xF4B0 | 98 | #define REG_BAT_STATUS 0xF4B0 |
99 | #define BIT_BAT_STATUS_LOW (1 << 5) | 99 | #define BIT_BAT_STATUS_LOW (1 << 5) |
100 | #define BIT_BAT_STATUS_DESTROY (1 << 2) | 100 | #define BIT_BAT_STATUS_DESTROY (1 << 2) |
101 | #define BIT_BAT_STATUS_FULL (1 << 1) | 101 | #define BIT_BAT_STATUS_FULL (1 << 1) |
102 | #define BIT_BAT_STATUS_IN (1 << 0) | 102 | #define BIT_BAT_STATUS_IN (1 << 0) |
103 | #define REG_BAT_CHARGE_STATUS 0xF4B1 | 103 | #define REG_BAT_CHARGE_STATUS 0xF4B1 |
104 | #define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) | 104 | #define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) |
105 | #define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) | 105 | #define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) |
106 | #define REG_BAT_STATE 0xF482 | 106 | #define REG_BAT_STATE 0xF482 |
107 | #define BIT_BAT_STATE_CHARGING (1 << 1) | 107 | #define BIT_BAT_STATE_CHARGING (1 << 1) |
108 | #define BIT_BAT_STATE_DISCHARGING (1 << 0) | 108 | #define BIT_BAT_STATE_DISCHARGING (1 << 0) |
109 | #define REG_BAT_POWER 0xF440 | 109 | #define REG_BAT_POWER 0xF440 |
110 | #define BIT_BAT_POWER_S3 (1 << 2) | 110 | #define BIT_BAT_POWER_S3 (1 << 2) |
111 | #define BIT_BAT_POWER_ON (1 << 1) | 111 | #define BIT_BAT_POWER_ON (1 << 1) |
112 | #define BIT_BAT_POWER_ACIN (1 << 0) | 112 | #define BIT_BAT_POWER_ACIN (1 << 0) |
113 | 113 | ||
114 | /* other registers */ | 114 | /* other registers */ |
115 | /* Audio: rd/wr */ | 115 | /* Audio: rd/wr */ |
116 | #define REG_AUDIO_VOLUME 0xF46C | 116 | #define REG_AUDIO_VOLUME 0xF46C |
117 | #define REG_AUDIO_MUTE 0xF4E7 | 117 | #define REG_AUDIO_MUTE 0xF4E7 |
118 | #define REG_AUDIO_BEEP 0xF4D0 | 118 | #define REG_AUDIO_BEEP 0xF4D0 |
119 | /* USB port power or not: rd/wr */ | 119 | /* USB port power or not: rd/wr */ |
120 | #define REG_USB0_FLAG 0xF461 | 120 | #define REG_USB0_FLAG 0xF461 |
121 | #define REG_USB1_FLAG 0xF462 | 121 | #define REG_USB1_FLAG 0xF462 |
122 | #define REG_USB2_FLAG 0xF463 | 122 | #define REG_USB2_FLAG 0xF463 |
123 | #define BIT_USB_FLAG_ON 1 | 123 | #define BIT_USB_FLAG_ON 1 |
124 | #define BIT_USB_FLAG_OFF 0 | 124 | #define BIT_USB_FLAG_OFF 0 |
125 | /* LID */ | 125 | /* LID */ |
126 | #define REG_LID_DETECT 0xF4BD | 126 | #define REG_LID_DETECT 0xF4BD |
127 | #define BIT_LID_DETECT_ON 1 | 127 | #define BIT_LID_DETECT_ON 1 |
128 | #define BIT_LID_DETECT_OFF 0 | 128 | #define BIT_LID_DETECT_OFF 0 |
129 | /* CRT */ | 129 | /* CRT */ |
130 | #define REG_CRT_DETECT 0xF4AD | 130 | #define REG_CRT_DETECT 0xF4AD |
131 | #define BIT_CRT_DETECT_PLUG 1 | 131 | #define BIT_CRT_DETECT_PLUG 1 |
132 | #define BIT_CRT_DETECT_UNPLUG 0 | 132 | #define BIT_CRT_DETECT_UNPLUG 0 |
133 | /* LCD backlight brightness adjust: 9 levels */ | 133 | /* LCD backlight brightness adjust: 9 levels */ |
134 | #define REG_DISPLAY_BRIGHTNESS 0xF4F5 | 134 | #define REG_DISPLAY_BRIGHTNESS 0xF4F5 |
135 | /* Black screen Status */ | 135 | /* Black screen Status */ |
136 | #define BIT_DISPLAY_LCD_ON 1 | 136 | #define BIT_DISPLAY_LCD_ON 1 |
137 | #define BIT_DISPLAY_LCD_OFF 0 | 137 | #define BIT_DISPLAY_LCD_OFF 0 |
138 | /* LCD backlight control: off/restore */ | 138 | /* LCD backlight control: off/restore */ |
139 | #define REG_BACKLIGHT_CTRL 0xF7BD | 139 | #define REG_BACKLIGHT_CTRL 0xF7BD |
140 | #define BIT_BACKLIGHT_ON 1 | 140 | #define BIT_BACKLIGHT_ON 1 |
141 | #define BIT_BACKLIGHT_OFF 0 | 141 | #define BIT_BACKLIGHT_OFF 0 |
142 | /* Reset the machine auto-clear: rd/wr */ | 142 | /* Reset the machine auto-clear: rd/wr */ |
143 | #define REG_RESET 0xF4EC | 143 | #define REG_RESET 0xF4EC |
144 | #define BIT_RESET_ON 1 | 144 | #define BIT_RESET_ON 1 |
145 | /* Light the led: rd/wr */ | 145 | /* Light the led: rd/wr */ |
146 | #define REG_LED 0xF4C8 | 146 | #define REG_LED 0xF4C8 |
147 | #define BIT_LED_RED_POWER (1 << 0) | 147 | #define BIT_LED_RED_POWER (1 << 0) |
148 | #define BIT_LED_ORANGE_POWER (1 << 1) | 148 | #define BIT_LED_ORANGE_POWER (1 << 1) |
149 | #define BIT_LED_GREEN_CHARGE (1 << 2) | 149 | #define BIT_LED_GREEN_CHARGE (1 << 2) |
150 | #define BIT_LED_RED_CHARGE (1 << 3) | 150 | #define BIT_LED_RED_CHARGE (1 << 3) |
151 | #define BIT_LED_NUMLOCK (1 << 4) | 151 | #define BIT_LED_NUMLOCK (1 << 4) |
152 | /* Test led mode, all led on/off */ | 152 | /* Test led mode, all led on/off */ |
153 | #define REG_LED_TEST 0xF4C2 | 153 | #define REG_LED_TEST 0xF4C2 |
154 | #define BIT_LED_TEST_IN 1 | 154 | #define BIT_LED_TEST_IN 1 |
155 | #define BIT_LED_TEST_OUT 0 | 155 | #define BIT_LED_TEST_OUT 0 |
156 | /* Camera on/off */ | 156 | /* Camera on/off */ |
157 | #define REG_CAMERA_STATUS 0xF46A | 157 | #define REG_CAMERA_STATUS 0xF46A |
158 | #define BIT_CAMERA_STATUS_ON 1 | 158 | #define BIT_CAMERA_STATUS_ON 1 |
159 | #define BIT_CAMERA_STATUS_OFF 0 | 159 | #define BIT_CAMERA_STATUS_OFF 0 |
160 | #define REG_CAMERA_CONTROL 0xF7B7 | 160 | #define REG_CAMERA_CONTROL 0xF7B7 |
161 | #define BIT_CAMERA_CONTROL_OFF 0 | 161 | #define BIT_CAMERA_CONTROL_OFF 0 |
162 | #define BIT_CAMERA_CONTROL_ON 1 | 162 | #define BIT_CAMERA_CONTROL_ON 1 |
163 | /* Wlan Status */ | 163 | /* Wlan Status */ |
164 | #define REG_WLAN 0xF4FA | 164 | #define REG_WLAN 0xF4FA |
165 | #define BIT_WLAN_ON 1 | 165 | #define BIT_WLAN_ON 1 |
166 | #define BIT_WLAN_OFF 0 | 166 | #define BIT_WLAN_OFF 0 |
167 | #define REG_DISPLAY_LCD 0xF79F | 167 | #define REG_DISPLAY_LCD 0xF79F |
168 | 168 | ||
169 | /* SCI Event Number from EC */ | 169 | /* SCI Event Number from EC */ |
170 | enum { | 170 | enum { |