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Diffstat (limited to 'arch/mips/loongson/lemote-2f/ec_kb3310b.h')
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1 files changed, 188 insertions, 0 deletions
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.h b/arch/mips/loongson/lemote-2f/ec_kb3310b.h new file mode 100644 index 000000000000..1595a21b315b --- /dev/null +++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.h | |||
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1 | /* | ||
2 | * KB3310B Embedded Controller | ||
3 | * | ||
4 | * Copyright (C) 2008 Lemote Inc. | ||
5 | * Author: liujl <liujl@lemote.com>, 2008-03-14 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _EC_KB3310B_H | ||
14 | #define _EC_KB3310B_H | ||
15 | |||
16 | extern unsigned char ec_read(unsigned short addr); | ||
17 | extern void ec_write(unsigned short addr, unsigned char val); | ||
18 | extern int ec_query_seq(unsigned char cmd); | ||
19 | extern int ec_query_event_num(void); | ||
20 | extern int ec_get_event_num(void); | ||
21 | |||
22 | typedef int (*sci_handler) (int status); | ||
23 | extern sci_handler yeeloong_report_lid_status; | ||
24 | |||
25 | #define SCI_IRQ_NUM 0x0A | ||
26 | |||
27 | /* | ||
28 | * The following registers are determined by the EC index configuration. | ||
29 | * 1, fill the PORT_HIGH as EC register high part. | ||
30 | * 2, fill the PORT_LOW as EC register low part. | ||
31 | * 3, fill the PORT_DATA as EC register write data or get the data from it. | ||
32 | */ | ||
33 | #define EC_IO_PORT_HIGH 0x0381 | ||
34 | #define EC_IO_PORT_LOW 0x0382 | ||
35 | #define EC_IO_PORT_DATA 0x0383 | ||
36 | |||
37 | /* | ||
38 | * EC delay time is 500us for register and status access | ||
39 | */ | ||
40 | #define EC_REG_DELAY 500 /* unit : us */ | ||
41 | #define EC_CMD_TIMEOUT 0x1000 | ||
42 | |||
43 | /* | ||
44 | * EC access port for SCI communication | ||
45 | */ | ||
46 | #define EC_CMD_PORT 0x66 | ||
47 | #define EC_STS_PORT 0x66 | ||
48 | #define EC_DAT_PORT 0x62 | ||
49 | #define CMD_INIT_IDLE_MODE 0xdd | ||
50 | #define CMD_EXIT_IDLE_MODE 0xdf | ||
51 | #define CMD_INIT_RESET_MODE 0xd8 | ||
52 | #define CMD_REBOOT_SYSTEM 0x8c | ||
53 | #define CMD_GET_EVENT_NUM 0x84 | ||
54 | #define CMD_PROGRAM_PIECE 0xda | ||
55 | |||
56 | /* temperature & fan registers */ | ||
57 | #define REG_TEMPERATURE_VALUE 0xF458 | ||
58 | #define REG_FAN_AUTO_MAN_SWITCH 0xF459 | ||
59 | #define BIT_FAN_AUTO 0 | ||
60 | #define BIT_FAN_MANUAL 1 | ||
61 | #define REG_FAN_CONTROL 0xF4D2 | ||
62 | #define BIT_FAN_CONTROL_ON (1 << 0) | ||
63 | #define BIT_FAN_CONTROL_OFF (0 << 0) | ||
64 | #define REG_FAN_STATUS 0xF4DA | ||
65 | #define BIT_FAN_STATUS_ON (1 << 0) | ||
66 | #define BIT_FAN_STATUS_OFF (0 << 0) | ||
67 | #define REG_FAN_SPEED_HIGH 0xFE22 | ||
68 | #define REG_FAN_SPEED_LOW 0xFE23 | ||
69 | #define REG_FAN_SPEED_LEVEL 0xF4CC | ||
70 | /* fan speed divider */ | ||
71 | #define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ | ||
72 | |||
73 | /* battery registers */ | ||
74 | #define REG_BAT_DESIGN_CAP_HIGH 0xF77D | ||
75 | #define REG_BAT_DESIGN_CAP_LOW 0xF77E | ||
76 | #define REG_BAT_FULLCHG_CAP_HIGH 0xF780 | ||
77 | #define REG_BAT_FULLCHG_CAP_LOW 0xF781 | ||
78 | #define REG_BAT_DESIGN_VOL_HIGH 0xF782 | ||
79 | #define REG_BAT_DESIGN_VOL_LOW 0xF783 | ||
80 | #define REG_BAT_CURRENT_HIGH 0xF784 | ||
81 | #define REG_BAT_CURRENT_LOW 0xF785 | ||
82 | #define REG_BAT_VOLTAGE_HIGH 0xF786 | ||
83 | #define REG_BAT_VOLTAGE_LOW 0xF787 | ||
84 | #define REG_BAT_TEMPERATURE_HIGH 0xF788 | ||
85 | #define REG_BAT_TEMPERATURE_LOW 0xF789 | ||
86 | #define REG_BAT_RELATIVE_CAP_HIGH 0xF492 | ||
87 | #define REG_BAT_RELATIVE_CAP_LOW 0xF493 | ||
88 | #define REG_BAT_VENDOR 0xF4C4 | ||
89 | #define FLAG_BAT_VENDOR_SANYO 0x01 | ||
90 | #define FLAG_BAT_VENDOR_SIMPLO 0x02 | ||
91 | #define REG_BAT_CELL_COUNT 0xF4C6 | ||
92 | #define FLAG_BAT_CELL_3S1P 0x03 | ||
93 | #define FLAG_BAT_CELL_3S2P 0x06 | ||
94 | #define REG_BAT_CHARGE 0xF4A2 | ||
95 | #define FLAG_BAT_CHARGE_DISCHARGE 0x01 | ||
96 | #define FLAG_BAT_CHARGE_CHARGE 0x02 | ||
97 | #define FLAG_BAT_CHARGE_ACPOWER 0x00 | ||
98 | #define REG_BAT_STATUS 0xF4B0 | ||
99 | #define BIT_BAT_STATUS_LOW (1 << 5) | ||
100 | #define BIT_BAT_STATUS_DESTROY (1 << 2) | ||
101 | #define BIT_BAT_STATUS_FULL (1 << 1) | ||
102 | #define BIT_BAT_STATUS_IN (1 << 0) | ||
103 | #define REG_BAT_CHARGE_STATUS 0xF4B1 | ||
104 | #define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) | ||
105 | #define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) | ||
106 | #define REG_BAT_STATE 0xF482 | ||
107 | #define BIT_BAT_STATE_CHARGING (1 << 1) | ||
108 | #define BIT_BAT_STATE_DISCHARGING (1 << 0) | ||
109 | #define REG_BAT_POWER 0xF440 | ||
110 | #define BIT_BAT_POWER_S3 (1 << 2) | ||
111 | #define BIT_BAT_POWER_ON (1 << 1) | ||
112 | #define BIT_BAT_POWER_ACIN (1 << 0) | ||
113 | |||
114 | /* other registers */ | ||
115 | /* Audio: rd/wr */ | ||
116 | #define REG_AUDIO_VOLUME 0xF46C | ||
117 | #define REG_AUDIO_MUTE 0xF4E7 | ||
118 | #define REG_AUDIO_BEEP 0xF4D0 | ||
119 | /* USB port power or not: rd/wr */ | ||
120 | #define REG_USB0_FLAG 0xF461 | ||
121 | #define REG_USB1_FLAG 0xF462 | ||
122 | #define REG_USB2_FLAG 0xF463 | ||
123 | #define BIT_USB_FLAG_ON 1 | ||
124 | #define BIT_USB_FLAG_OFF 0 | ||
125 | /* LID */ | ||
126 | #define REG_LID_DETECT 0xF4BD | ||
127 | #define BIT_LID_DETECT_ON 1 | ||
128 | #define BIT_LID_DETECT_OFF 0 | ||
129 | /* CRT */ | ||
130 | #define REG_CRT_DETECT 0xF4AD | ||
131 | #define BIT_CRT_DETECT_PLUG 1 | ||
132 | #define BIT_CRT_DETECT_UNPLUG 0 | ||
133 | /* LCD backlight brightness adjust: 9 levels */ | ||
134 | #define REG_DISPLAY_BRIGHTNESS 0xF4F5 | ||
135 | /* Black screen Status */ | ||
136 | #define BIT_DISPLAY_LCD_ON 1 | ||
137 | #define BIT_DISPLAY_LCD_OFF 0 | ||
138 | /* LCD backlight control: off/restore */ | ||
139 | #define REG_BACKLIGHT_CTRL 0xF7BD | ||
140 | #define BIT_BACKLIGHT_ON 1 | ||
141 | #define BIT_BACKLIGHT_OFF 0 | ||
142 | /* Reset the machine auto-clear: rd/wr */ | ||
143 | #define REG_RESET 0xF4EC | ||
144 | #define BIT_RESET_ON 1 | ||
145 | /* Light the led: rd/wr */ | ||
146 | #define REG_LED 0xF4C8 | ||
147 | #define BIT_LED_RED_POWER (1 << 0) | ||
148 | #define BIT_LED_ORANGE_POWER (1 << 1) | ||
149 | #define BIT_LED_GREEN_CHARGE (1 << 2) | ||
150 | #define BIT_LED_RED_CHARGE (1 << 3) | ||
151 | #define BIT_LED_NUMLOCK (1 << 4) | ||
152 | /* Test led mode, all led on/off */ | ||
153 | #define REG_LED_TEST 0xF4C2 | ||
154 | #define BIT_LED_TEST_IN 1 | ||
155 | #define BIT_LED_TEST_OUT 0 | ||
156 | /* Camera on/off */ | ||
157 | #define REG_CAMERA_STATUS 0xF46A | ||
158 | #define BIT_CAMERA_STATUS_ON 1 | ||
159 | #define BIT_CAMERA_STATUS_OFF 0 | ||
160 | #define REG_CAMERA_CONTROL 0xF7B7 | ||
161 | #define BIT_CAMERA_CONTROL_OFF 0 | ||
162 | #define BIT_CAMERA_CONTROL_ON 1 | ||
163 | /* Wlan Status */ | ||
164 | #define REG_WLAN 0xF4FA | ||
165 | #define BIT_WLAN_ON 1 | ||
166 | #define BIT_WLAN_OFF 0 | ||
167 | #define REG_DISPLAY_LCD 0xF79F | ||
168 | |||
169 | /* SCI Event Number from EC */ | ||
170 | enum { | ||
171 | EVENT_LID = 0x23, /* LID open/close */ | ||
172 | EVENT_DISPLAY_TOGGLE, /* Fn+F3 for display switch */ | ||
173 | EVENT_SLEEP, /* Fn+F1 for entering sleep mode */ | ||
174 | EVENT_OVERTEMP, /* Over-temperature happened */ | ||
175 | EVENT_CRT_DETECT, /* CRT is connected */ | ||
176 | EVENT_CAMERA, /* Camera on/off */ | ||
177 | EVENT_USB_OC2, /* USB2 Over Current occurred */ | ||
178 | EVENT_USB_OC0, /* USB0 Over Current occurred */ | ||
179 | EVENT_BLACK_SCREEN, /* Turn on/off backlight */ | ||
180 | EVENT_AUDIO_MUTE, /* Mute on/off */ | ||
181 | EVENT_DISPLAY_BRIGHTNESS,/* LCD backlight brightness adjust */ | ||
182 | EVENT_AC_BAT, /* AC & Battery relative issue */ | ||
183 | EVENT_AUDIO_VOLUME, /* Volume adjust */ | ||
184 | EVENT_WLAN, /* Wlan on/off */ | ||
185 | EVENT_END | ||
186 | }; | ||
187 | |||
188 | #endif /* !_EC_KB3310B_H */ | ||