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-rw-r--r--arch/mips/lib/csum_partial.S9
-rw-r--r--arch/mips/lib/delay.c14
-rw-r--r--arch/mips/lib/strncpy_user.S13
3 files changed, 25 insertions, 11 deletions
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index 2e4825e48388..9901237563c5 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -56,14 +56,20 @@
56#define UNIT(unit) ((unit)*NBYTES) 56#define UNIT(unit) ((unit)*NBYTES)
57 57
58#define ADDC(sum,reg) \ 58#define ADDC(sum,reg) \
59 .set push; \
60 .set noat; \
59 ADD sum, reg; \ 61 ADD sum, reg; \
60 sltu v1, sum, reg; \ 62 sltu v1, sum, reg; \
61 ADD sum, v1; \ 63 ADD sum, v1; \
64 .set pop
62 65
63#define ADDC32(sum,reg) \ 66#define ADDC32(sum,reg) \
67 .set push; \
68 .set noat; \
64 addu sum, reg; \ 69 addu sum, reg; \
65 sltu v1, sum, reg; \ 70 sltu v1, sum, reg; \
66 addu sum, v1; \ 71 addu sum, v1; \
72 .set pop
67 73
68#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ 74#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
69 LOAD _t0, (offset + UNIT(0))(src); \ 75 LOAD _t0, (offset + UNIT(0))(src); \
@@ -710,6 +716,8 @@ LEAF(csum_partial)
710 ADDC(sum, t2) 716 ADDC(sum, t2)
711.Ldone\@: 717.Ldone\@:
712 /* fold checksum */ 718 /* fold checksum */
719 .set push
720 .set noat
713#ifdef USE_DOUBLE 721#ifdef USE_DOUBLE
714 dsll32 v1, sum, 0 722 dsll32 v1, sum, 0
715 daddu sum, v1 723 daddu sum, v1
@@ -732,6 +740,7 @@ LEAF(csum_partial)
732 or sum, sum, t0 740 or sum, sum, t0
7331: 7411:
734#endif 742#endif
743 .set pop
735 .set reorder 744 .set reorder
736 ADDC32(sum, psum) 745 ADDC32(sum, psum)
737 jr ra 746 jr ra
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 44713af15a62..705cfb7c1a74 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 1994 by Waldorf Electronics 6 * Copyright (C) 1994 by Waldorf Electronics
7 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle 7 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2007 Maciej W. Rozycki 9 * Copyright (C) 2007, 2014 Maciej W. Rozycki
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/param.h> 12#include <linux/param.h>
@@ -15,6 +15,12 @@
15#include <asm/compiler.h> 15#include <asm/compiler.h>
16#include <asm/war.h> 16#include <asm/war.h>
17 17
18#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
19#define GCC_DADDI_IMM_ASM() "I"
20#else
21#define GCC_DADDI_IMM_ASM() "r"
22#endif
23
18void __delay(unsigned long loops) 24void __delay(unsigned long loops)
19{ 25{
20 __asm__ __volatile__ ( 26 __asm__ __volatile__ (
@@ -22,13 +28,13 @@ void __delay(unsigned long loops)
22 " .align 3 \n" 28 " .align 3 \n"
23 "1: bnez %0, 1b \n" 29 "1: bnez %0, 1b \n"
24#if BITS_PER_LONG == 32 30#if BITS_PER_LONG == 32
25 " subu %0, 1 \n" 31 " subu %0, %1 \n"
26#else 32#else
27 " dsubu %0, 1 \n" 33 " dsubu %0, %1 \n"
28#endif 34#endif
29 " .set reorder \n" 35 " .set reorder \n"
30 : "=r" (loops) 36 : "=r" (loops)
31 : "0" (loops)); 37 : GCC_DADDI_IMM_ASM() (1), "0" (loops));
32} 38}
33EXPORT_SYMBOL(__delay); 39EXPORT_SYMBOL(__delay);
34 40
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
index d3301cd1e9a5..3c32baf8b494 100644
--- a/arch/mips/lib/strncpy_user.S
+++ b/arch/mips/lib/strncpy_user.S
@@ -35,7 +35,6 @@ LEAF(__strncpy_from_\func\()_asm)
35 bnez v0, .Lfault\@ 35 bnez v0, .Lfault\@
36 36
37FEXPORT(__strncpy_from_\func\()_nocheck_asm) 37FEXPORT(__strncpy_from_\func\()_nocheck_asm)
38 .set noreorder
39 move t0, zero 38 move t0, zero
40 move v1, a1 39 move v1, a1
41.ifeqs "\func","kernel" 40.ifeqs "\func","kernel"
@@ -45,21 +44,21 @@ FEXPORT(__strncpy_from_\func\()_nocheck_asm)
45.endif 44.endif
46 PTR_ADDIU v1, 1 45 PTR_ADDIU v1, 1
47 R10KCBARRIER(0(ra)) 46 R10KCBARRIER(0(ra))
47 sb v0, (a0)
48 beqz v0, 2f 48 beqz v0, 2f
49 sb v0, (a0)
50 PTR_ADDIU t0, 1 49 PTR_ADDIU t0, 1
50 PTR_ADDIU a0, 1
51 bne t0, a2, 1b 51 bne t0, a2, 1b
52 PTR_ADDIU a0, 1
532: PTR_ADDU v0, a1, t0 522: PTR_ADDU v0, a1, t0
54 xor v0, a1 53 xor v0, a1
55 bltz v0, .Lfault\@ 54 bltz v0, .Lfault\@
56 nop 55 move v0, t0
57 jr ra # return n 56 jr ra # return n
58 move v0, t0
59 END(__strncpy_from_\func\()_asm) 57 END(__strncpy_from_\func\()_asm)
60 58
61.Lfault\@: jr ra 59.Lfault\@:
62 li v0, -EFAULT 60 li v0, -EFAULT
61 jr ra
63 62
64 .section __ex_table,"a" 63 .section __ex_table,"a"
65 PTR 1b, .Lfault\@ 64 PTR 1b, .Lfault\@