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-rw-r--r--arch/mips/lib/Makefile10
-rw-r--r--arch/mips/lib/csum_partial_copy.c49
-rw-r--r--arch/mips/lib/dec_and_lock.c55
-rw-r--r--arch/mips/lib/iomap.c78
-rw-r--r--arch/mips/lib/memcpy.S508
-rw-r--r--arch/mips/lib/promlib.c24
-rw-r--r--arch/mips/lib/strlen_user.S39
-rw-r--r--arch/mips/lib/strncpy_user.S58
-rw-r--r--arch/mips/lib/strnlen_user.S45
9 files changed, 866 insertions, 0 deletions
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
new file mode 100644
index 000000000000..21b92b9dd013
--- /dev/null
+++ b/arch/mips/lib/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for MIPS-specific library files..
3#
4
5lib-y += csum_partial_copy.o dec_and_lock.o memcpy.o promlib.o \
6 strlen_user.o strncpy_user.o strnlen_user.o
7
8obj-y += iomap.o
9
10EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/lib/csum_partial_copy.c b/arch/mips/lib/csum_partial_copy.c
new file mode 100644
index 000000000000..ffed0a6a1c16
--- /dev/null
+++ b/arch/mips/lib/csum_partial_copy.c
@@ -0,0 +1,49 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 1995 Waldorf Electronics GmbH
7 * Copyright (C) 1998, 1999 Ralf Baechle
8 */
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <asm/byteorder.h>
12#include <asm/string.h>
13#include <asm/uaccess.h>
14#include <net/checksum.h>
15
16/*
17 * copy while checksumming, otherwise like csum_partial
18 */
19unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst,
20 int len, unsigned int sum)
21{
22 /*
23 * It's 2:30 am and I don't feel like doing it real ...
24 * This is lots slower than the real thing (tm)
25 */
26 sum = csum_partial(src, len, sum);
27 memcpy(dst, src, len);
28
29 return sum;
30}
31
32/*
33 * Copy from userspace and compute checksum. If we catch an exception
34 * then zero the rest of the buffer.
35 */
36unsigned int csum_partial_copy_from_user (const unsigned char *src, unsigned char *dst,
37 int len, unsigned int sum, int *err_ptr)
38{
39 int missing;
40
41 might_sleep();
42 missing = copy_from_user(dst, src, len);
43 if (missing) {
44 memset(dst + len - missing, 0, missing);
45 *err_ptr = -EFAULT;
46 }
47
48 return csum_partial(dst, len, sum);
49}
diff --git a/arch/mips/lib/dec_and_lock.c b/arch/mips/lib/dec_and_lock.c
new file mode 100644
index 000000000000..e44e9579bd36
--- /dev/null
+++ b/arch/mips/lib/dec_and_lock.c
@@ -0,0 +1,55 @@
1/*
2 * MIPS version of atomic_dec_and_lock() using cmpxchg
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/module.h>
11#include <linux/spinlock.h>
12#include <asm/atomic.h>
13#include <asm/system.h>
14
15/*
16 * This is an implementation of the notion of "decrement a
17 * reference count, and return locked if it decremented to zero".
18 *
19 * This implementation can be used on any architecture that
20 * has a cmpxchg, and where atomic->value is an int holding
21 * the value of the atomic (i.e. the high bits aren't used
22 * for a lock or anything like that).
23 *
24 * N.B. ATOMIC_DEC_AND_LOCK gets defined in include/linux/spinlock.h
25 * if spinlocks are empty and thus atomic_dec_and_lock is defined
26 * to be atomic_dec_and_test - in that case we don't need it
27 * defined here as well.
28 */
29
30#ifndef ATOMIC_DEC_AND_LOCK
31int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
32{
33 int counter;
34 int newcount;
35
36 for (;;) {
37 counter = atomic_read(atomic);
38 newcount = counter - 1;
39 if (!newcount)
40 break; /* do it the slow way */
41
42 newcount = cmpxchg(&atomic->counter, counter, newcount);
43 if (newcount == counter)
44 return 0;
45 }
46
47 spin_lock(lock);
48 if (atomic_dec_and_test(atomic))
49 return 1;
50 spin_unlock(lock);
51 return 0;
52}
53
54EXPORT_SYMBOL(_atomic_dec_and_lock);
55#endif /* ATOMIC_DEC_AND_LOCK */
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
new file mode 100644
index 000000000000..b5d5fa833762
--- /dev/null
+++ b/arch/mips/lib/iomap.c
@@ -0,0 +1,78 @@
1/*
2 * iomap.c, Memory Mapped I/O routines for MIPS architecture.
3 *
4 * This code is based on lib/iomap.c, by Linus Torvalds.
5 *
6 * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/ioport.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25
26#include <asm/io.h>
27
28void __iomem *ioport_map(unsigned long port, unsigned int nr)
29{
30 unsigned long end;
31
32 end = port + nr - 1UL;
33 if (ioport_resource.start > port ||
34 ioport_resource.end < end || port > end)
35 return NULL;
36
37 return (void __iomem *)(mips_io_port_base + port);
38}
39
40void ioport_unmap(void __iomem *addr)
41{
42}
43EXPORT_SYMBOL(ioport_map);
44EXPORT_SYMBOL(ioport_unmap);
45
46void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
47{
48 unsigned long start, len, flags;
49
50 if (dev == NULL)
51 return NULL;
52
53 start = pci_resource_start(dev, bar);
54 len = pci_resource_len(dev, bar);
55 if (!start || !len)
56 return NULL;
57
58 if (maxlen != 0 && len > maxlen)
59 len = maxlen;
60
61 flags = pci_resource_flags(dev, bar);
62 if (flags & IORESOURCE_IO)
63 return ioport_map(start, len);
64 if (flags & IORESOURCE_MEM) {
65 if (flags & IORESOURCE_CACHEABLE)
66 return ioremap_cacheable_cow(start, len);
67 return ioremap_nocache(start, len);
68 }
69
70 return NULL;
71}
72
73void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
74{
75 iounmap(addr);
76}
77EXPORT_SYMBOL(pci_iomap);
78EXPORT_SYMBOL(pci_iounmap);
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
new file mode 100644
index 000000000000..afa8eae18ff6
--- /dev/null
+++ b/arch/mips/lib/memcpy.S
@@ -0,0 +1,508 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Unified implementation of memcpy, memmove and the __copy_user backend.
7 *
8 * Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org)
9 * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc.
10 * Copyright (C) 2002 Broadcom, Inc.
11 * memcpy/copy_user author: Mark Vandevoorde
12 *
13 * Mnemonic names for arguments to memcpy/__copy_user
14 */
15#include <linux/config.h>
16#include <asm/asm.h>
17#include <asm/offset.h>
18#include <asm/regdef.h>
19
20#define dst a0
21#define src a1
22#define len a2
23
24/*
25 * Spec
26 *
27 * memcpy copies len bytes from src to dst and sets v0 to dst.
28 * It assumes that
29 * - src and dst don't overlap
30 * - src is readable
31 * - dst is writable
32 * memcpy uses the standard calling convention
33 *
34 * __copy_user copies up to len bytes from src to dst and sets a2 (len) to
35 * the number of uncopied bytes due to an exception caused by a read or write.
36 * __copy_user assumes that src and dst don't overlap, and that the call is
37 * implementing one of the following:
38 * copy_to_user
39 * - src is readable (no exceptions when reading src)
40 * copy_from_user
41 * - dst is writable (no exceptions when writing dst)
42 * __copy_user uses a non-standard calling convention; see
43 * include/asm-mips/uaccess.h
44 *
45 * When an exception happens on a load, the handler must
46 # ensure that all of the destination buffer is overwritten to prevent
47 * leaking information to user mode programs.
48 */
49
50/*
51 * Implementation
52 */
53
54/*
55 * The exception handler for loads requires that:
56 * 1- AT contain the address of the byte just past the end of the source
57 * of the copy,
58 * 2- src_entry <= src < AT, and
59 * 3- (dst - src) == (dst_entry - src_entry),
60 * The _entry suffix denotes values when __copy_user was called.
61 *
62 * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user
63 * (2) is met by incrementing src by the number of bytes copied
64 * (3) is met by not doing loads between a pair of increments of dst and src
65 *
66 * The exception handlers for stores adjust len (if necessary) and return.
67 * These handlers do not need to overwrite any data.
68 *
69 * For __rmemcpy and memmove an exception is always a kernel bug, therefore
70 * they're not protected.
71 */
72
73#define EXC(inst_reg,addr,handler) \
749: inst_reg, addr; \
75 .section __ex_table,"a"; \
76 PTR 9b, handler; \
77 .previous
78
79/*
80 * Only on the 64-bit kernel we can made use of 64-bit registers.
81 */
82#ifdef CONFIG_MIPS64
83#define USE_DOUBLE
84#endif
85
86#ifdef USE_DOUBLE
87
88#define LOAD ld
89#define LOADL ldl
90#define LOADR ldr
91#define STOREL sdl
92#define STORER sdr
93#define STORE sd
94#define ADD daddu
95#define SUB dsubu
96#define SRL dsrl
97#define SRA dsra
98#define SLL dsll
99#define SLLV dsllv
100#define SRLV dsrlv
101#define NBYTES 8
102#define LOG_NBYTES 3
103
104/*
105 * As we are sharing code base with the mips32 tree (which use the o32 ABI
106 * register definitions). We need to redefine the register definitions from
107 * the n64 ABI register naming to the o32 ABI register naming.
108 */
109#undef t0
110#undef t1
111#undef t2
112#undef t3
113#define t0 $8
114#define t1 $9
115#define t2 $10
116#define t3 $11
117#define t4 $12
118#define t5 $13
119#define t6 $14
120#define t7 $15
121
122#else
123
124#define LOAD lw
125#define LOADL lwl
126#define LOADR lwr
127#define STOREL swl
128#define STORER swr
129#define STORE sw
130#define ADD addu
131#define SUB subu
132#define SRL srl
133#define SLL sll
134#define SRA sra
135#define SLLV sllv
136#define SRLV srlv
137#define NBYTES 4
138#define LOG_NBYTES 2
139
140#endif /* USE_DOUBLE */
141
142#ifdef CONFIG_CPU_LITTLE_ENDIAN
143#define LDFIRST LOADR
144#define LDREST LOADL
145#define STFIRST STORER
146#define STREST STOREL
147#define SHIFT_DISCARD SLLV
148#else
149#define LDFIRST LOADL
150#define LDREST LOADR
151#define STFIRST STOREL
152#define STREST STORER
153#define SHIFT_DISCARD SRLV
154#endif
155
156#define FIRST(unit) ((unit)*NBYTES)
157#define REST(unit) (FIRST(unit)+NBYTES-1)
158#define UNIT(unit) FIRST(unit)
159
160#define ADDRMASK (NBYTES-1)
161
162 .text
163 .set noreorder
164 .set noat
165
166/*
167 * A combined memcpy/__copy_user
168 * __copy_user sets len to 0 for success; else to an upper bound of
169 * the number of uncopied bytes.
170 * memcpy sets v0 to dst.
171 */
172 .align 5
173LEAF(memcpy) /* a0=dst a1=src a2=len */
174 move v0, dst /* return value */
175__memcpy:
176FEXPORT(__copy_user)
177 /*
178 * Note: dst & src may be unaligned, len may be 0
179 * Temps
180 */
181#define rem t8
182
183 /*
184 * The "issue break"s below are very approximate.
185 * Issue delays for dcache fills will perturb the schedule, as will
186 * load queue full replay traps, etc.
187 *
188 * If len < NBYTES use byte operations.
189 */
190 PREF( 0, 0(src) )
191 PREF( 1, 0(dst) )
192 sltu t2, len, NBYTES
193 and t1, dst, ADDRMASK
194 PREF( 0, 1*32(src) )
195 PREF( 1, 1*32(dst) )
196 bnez t2, copy_bytes_checklen
197 and t0, src, ADDRMASK
198 PREF( 0, 2*32(src) )
199 PREF( 1, 2*32(dst) )
200 bnez t1, dst_unaligned
201 nop
202 bnez t0, src_unaligned_dst_aligned
203 /*
204 * use delay slot for fall-through
205 * src and dst are aligned; need to compute rem
206 */
207both_aligned:
208 SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
209 beqz t0, cleanup_both_aligned # len < 8*NBYTES
210 and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES)
211 PREF( 0, 3*32(src) )
212 PREF( 1, 3*32(dst) )
213 .align 4
2141:
215EXC( LOAD t0, UNIT(0)(src), l_exc)
216EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
217EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
218EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
219 SUB len, len, 8*NBYTES
220EXC( LOAD t4, UNIT(4)(src), l_exc_copy)
221EXC( LOAD t7, UNIT(5)(src), l_exc_copy)
222EXC( STORE t0, UNIT(0)(dst), s_exc_p8u)
223EXC( STORE t1, UNIT(1)(dst), s_exc_p7u)
224EXC( LOAD t0, UNIT(6)(src), l_exc_copy)
225EXC( LOAD t1, UNIT(7)(src), l_exc_copy)
226 ADD src, src, 8*NBYTES
227 ADD dst, dst, 8*NBYTES
228EXC( STORE t2, UNIT(-6)(dst), s_exc_p6u)
229EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u)
230EXC( STORE t4, UNIT(-4)(dst), s_exc_p4u)
231EXC( STORE t7, UNIT(-3)(dst), s_exc_p3u)
232EXC( STORE t0, UNIT(-2)(dst), s_exc_p2u)
233EXC( STORE t1, UNIT(-1)(dst), s_exc_p1u)
234 PREF( 0, 8*32(src) )
235 PREF( 1, 8*32(dst) )
236 bne len, rem, 1b
237 nop
238
239 /*
240 * len == rem == the number of bytes left to copy < 8*NBYTES
241 */
242cleanup_both_aligned:
243 beqz len, done
244 sltu t0, len, 4*NBYTES
245 bnez t0, less_than_4units
246 and rem, len, (NBYTES-1) # rem = len % NBYTES
247 /*
248 * len >= 4*NBYTES
249 */
250EXC( LOAD t0, UNIT(0)(src), l_exc)
251EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
252EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
253EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
254 SUB len, len, 4*NBYTES
255 ADD src, src, 4*NBYTES
256EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
257EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
258EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
259EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
260 beqz len, done
261 ADD dst, dst, 4*NBYTES
262less_than_4units:
263 /*
264 * rem = len % NBYTES
265 */
266 beq rem, len, copy_bytes
267 nop
2681:
269EXC( LOAD t0, 0(src), l_exc)
270 ADD src, src, NBYTES
271 SUB len, len, NBYTES
272EXC( STORE t0, 0(dst), s_exc_p1u)
273 bne rem, len, 1b
274 ADD dst, dst, NBYTES
275
276 /*
277 * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
278 * A loop would do only a byte at a time with possible branch
279 * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE
280 * because can't assume read-access to dst. Instead, use
281 * STREST dst, which doesn't require read access to dst.
282 *
283 * This code should perform better than a simple loop on modern,
284 * wide-issue mips processors because the code has fewer branches and
285 * more instruction-level parallelism.
286 */
287#define bits t2
288 beqz len, done
289 ADD t1, dst, len # t1 is just past last byte of dst
290 li bits, 8*NBYTES
291 SLL rem, len, 3 # rem = number of bits to keep
292EXC( LOAD t0, 0(src), l_exc)
293 SUB bits, bits, rem # bits = number of bits to discard
294 SHIFT_DISCARD t0, t0, bits
295EXC( STREST t0, -1(t1), s_exc)
296 jr ra
297 move len, zero
298dst_unaligned:
299 /*
300 * dst is unaligned
301 * t0 = src & ADDRMASK
302 * t1 = dst & ADDRMASK; T1 > 0
303 * len >= NBYTES
304 *
305 * Copy enough bytes to align dst
306 * Set match = (src and dst have same alignment)
307 */
308#define match rem
309EXC( LDFIRST t3, FIRST(0)(src), l_exc)
310 ADD t2, zero, NBYTES
311EXC( LDREST t3, REST(0)(src), l_exc_copy)
312 SUB t2, t2, t1 # t2 = number of bytes copied
313 xor match, t0, t1
314EXC( STFIRST t3, FIRST(0)(dst), s_exc)
315 beq len, t2, done
316 SUB len, len, t2
317 ADD dst, dst, t2
318 beqz match, both_aligned
319 ADD src, src, t2
320
321src_unaligned_dst_aligned:
322 SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter
323 PREF( 0, 3*32(src) )
324 beqz t0, cleanup_src_unaligned
325 and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
326 PREF( 1, 3*32(dst) )
3271:
328/*
329 * Avoid consecutive LD*'s to the same register since some mips
330 * implementations can't issue them in the same cycle.
331 * It's OK to load FIRST(N+1) before REST(N) because the two addresses
332 * are to the same unit (unless src is aligned, but it's not).
333 */
334EXC( LDFIRST t0, FIRST(0)(src), l_exc)
335EXC( LDFIRST t1, FIRST(1)(src), l_exc_copy)
336 SUB len, len, 4*NBYTES
337EXC( LDREST t0, REST(0)(src), l_exc_copy)
338EXC( LDREST t1, REST(1)(src), l_exc_copy)
339EXC( LDFIRST t2, FIRST(2)(src), l_exc_copy)
340EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy)
341EXC( LDREST t2, REST(2)(src), l_exc_copy)
342EXC( LDREST t3, REST(3)(src), l_exc_copy)
343 PREF( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed)
344 ADD src, src, 4*NBYTES
345#ifdef CONFIG_CPU_SB1
346 nop # improves slotting
347#endif
348EXC( STORE t0, UNIT(0)(dst), s_exc_p4u)
349EXC( STORE t1, UNIT(1)(dst), s_exc_p3u)
350EXC( STORE t2, UNIT(2)(dst), s_exc_p2u)
351EXC( STORE t3, UNIT(3)(dst), s_exc_p1u)
352 PREF( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed)
353 bne len, rem, 1b
354 ADD dst, dst, 4*NBYTES
355
356cleanup_src_unaligned:
357 beqz len, done
358 and rem, len, NBYTES-1 # rem = len % NBYTES
359 beq rem, len, copy_bytes
360 nop
3611:
362EXC( LDFIRST t0, FIRST(0)(src), l_exc)
363EXC( LDREST t0, REST(0)(src), l_exc_copy)
364 ADD src, src, NBYTES
365 SUB len, len, NBYTES
366EXC( STORE t0, 0(dst), s_exc_p1u)
367 bne len, rem, 1b
368 ADD dst, dst, NBYTES
369
370copy_bytes_checklen:
371 beqz len, done
372 nop
373copy_bytes:
374 /* 0 < len < NBYTES */
375#define COPY_BYTE(N) \
376EXC( lb t0, N(src), l_exc); \
377 SUB len, len, 1; \
378 beqz len, done; \
379EXC( sb t0, N(dst), s_exc_p1)
380
381 COPY_BYTE(0)
382 COPY_BYTE(1)
383#ifdef USE_DOUBLE
384 COPY_BYTE(2)
385 COPY_BYTE(3)
386 COPY_BYTE(4)
387 COPY_BYTE(5)
388#endif
389EXC( lb t0, NBYTES-2(src), l_exc)
390 SUB len, len, 1
391 jr ra
392EXC( sb t0, NBYTES-2(dst), s_exc_p1)
393done:
394 jr ra
395 nop
396 END(memcpy)
397
398l_exc_copy:
399 /*
400 * Copy bytes from src until faulting load address (or until a
401 * lb faults)
402 *
403 * When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28)
404 * may be more than a byte beyond the last address.
405 * Hence, the lb below may get an exception.
406 *
407 * Assumes src < THREAD_BUADDR($28)
408 */
409 LOAD t0, TI_TASK($28)
410 nop
411 LOAD t0, THREAD_BUADDR(t0)
4121:
413EXC( lb t1, 0(src), l_exc)
414 ADD src, src, 1
415 sb t1, 0(dst) # can't fault -- we're copy_from_user
416 bne src, t0, 1b
417 ADD dst, dst, 1
418l_exc:
419 LOAD t0, TI_TASK($28)
420 nop
421 LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address
422 nop
423 SUB len, AT, t0 # len number of uncopied bytes
424 /*
425 * Here's where we rely on src and dst being incremented in tandem,
426 * See (3) above.
427 * dst += (fault addr - src) to put dst at first byte to clear
428 */
429 ADD dst, t0 # compute start address in a1
430 SUB dst, src
431 /*
432 * Clear len bytes starting at dst. Can't call __bzero because it
433 * might modify len. An inefficient loop for these rare times...
434 */
435 beqz len, done
436 SUB src, len, 1
4371: sb zero, 0(dst)
438 ADD dst, dst, 1
439 bnez src, 1b
440 SUB src, src, 1
441 jr ra
442 nop
443
444
445#define SEXC(n) \
446s_exc_p ## n ## u: \
447 jr ra; \
448 ADD len, len, n*NBYTES
449
450SEXC(8)
451SEXC(7)
452SEXC(6)
453SEXC(5)
454SEXC(4)
455SEXC(3)
456SEXC(2)
457SEXC(1)
458
459s_exc_p1:
460 jr ra
461 ADD len, len, 1
462s_exc:
463 jr ra
464 nop
465
466 .align 5
467LEAF(memmove)
468 ADD t0, a0, a2
469 ADD t1, a1, a2
470 sltu t0, a1, t0 # dst + len <= src -> memcpy
471 sltu t1, a0, t1 # dst >= src + len -> memcpy
472 and t0, t1
473 beqz t0, __memcpy
474 move v0, a0 /* return value */
475 beqz a2, r_out
476 END(memmove)
477
478 /* fall through to __rmemcpy */
479LEAF(__rmemcpy) /* a0=dst a1=src a2=len */
480 sltu t0, a1, a0
481 beqz t0, r_end_bytes_up # src >= dst
482 nop
483 ADD a0, a2 # dst = dst + len
484 ADD a1, a2 # src = src + len
485
486r_end_bytes:
487 lb t0, -1(a1)
488 SUB a2, a2, 0x1
489 sb t0, -1(a0)
490 SUB a1, a1, 0x1
491 bnez a2, r_end_bytes
492 SUB a0, a0, 0x1
493
494r_out:
495 jr ra
496 move a2, zero
497
498r_end_bytes_up:
499 lb t0, (a1)
500 SUB a2, a2, 0x1
501 sb t0, (a0)
502 ADD a1, a1, 0x1
503 bnez a2, r_end_bytes_up
504 ADD a0, a0, 0x1
505
506 jr ra
507 move a2, zero
508 END(__rmemcpy)
diff --git a/arch/mips/lib/promlib.c b/arch/mips/lib/promlib.c
new file mode 100644
index 000000000000..dddfe98b4ded
--- /dev/null
+++ b/arch/mips/lib/promlib.c
@@ -0,0 +1,24 @@
1#include <stdarg.h>
2#include <linux/kernel.h>
3
4extern void prom_putchar(char);
5
6void prom_printf(char *fmt, ...)
7{
8 va_list args;
9 char ppbuf[1024];
10 char *bptr;
11
12 va_start(args, fmt);
13 vsprintf(ppbuf, fmt, args);
14
15 bptr = ppbuf;
16
17 while (*bptr != 0) {
18 if (*bptr == '\n')
19 prom_putchar('\r');
20
21 prom_putchar(*bptr++);
22 }
23 va_end(args);
24}
diff --git a/arch/mips/lib/strlen_user.S b/arch/mips/lib/strlen_user.S
new file mode 100644
index 000000000000..07660e86c99d
--- /dev/null
+++ b/arch/mips/lib/strlen_user.S
@@ -0,0 +1,39 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1996, 1998, 1999, 2004 by Ralf Baechle
7 * Copyright (c) 1999 Silicon Graphics, Inc.
8 */
9#include <asm/asm.h>
10#include <asm/offset.h>
11#include <asm/regdef.h>
12
13#define EX(insn,reg,addr,handler) \
149: insn reg, addr; \
15 .section __ex_table,"a"; \
16 PTR 9b, handler; \
17 .previous
18
19/*
20 * Return the size of a string (including the ending 0)
21 *
22 * Return 0 for error
23 */
24LEAF(__strlen_user_asm)
25 LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
26 and v0, a0
27 bnez v0, fault
28
29FEXPORT(__strlen_user_nocheck_asm)
30 move v0, a0
311: EX(lb, t0, (v0), fault)
32 PTR_ADDIU v0, 1
33 bnez t0, 1b
34 PTR_SUBU v0, a0
35 jr ra
36 END(__strlen_user_asm)
37
38fault: move v0, zero
39 jr ra
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
new file mode 100644
index 000000000000..14bed17c1648
--- /dev/null
+++ b/arch/mips/lib/strncpy_user.S
@@ -0,0 +1,58 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1996, 1999 by Ralf Baechle
7 */
8#include <linux/errno.h>
9#include <asm/asm.h>
10#include <asm/offset.h>
11#include <asm/regdef.h>
12
13#define EX(insn,reg,addr,handler) \
149: insn reg, addr; \
15 .section __ex_table,"a"; \
16 PTR 9b, handler; \
17 .previous
18
19/*
20 * Returns: -EFAULT if exception before terminator, N if the entire
21 * buffer filled, else strlen.
22 */
23
24/*
25 * Ugly special case have to check: we might get passed a user space
26 * pointer which wraps into the kernel space. We don't deal with that. If
27 * it happens at most some bytes of the exceptions handlers will be copied.
28 */
29
30LEAF(__strncpy_from_user_asm)
31 LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
32 and v0, a1
33 bnez v0, fault
34
35FEXPORT(__strncpy_from_user_nocheck_asm)
36 move v0, zero
37 move v1, a1
38 .set noreorder
391: EX(lbu, t0, (v1), fault)
40 PTR_ADDIU v1, 1
41 beqz t0, 2f
42 sb t0, (a0)
43 PTR_ADDIU v0, 1
44 bne v0, a2, 1b
45 PTR_ADDIU a0, 1
46 .set reorder
472: PTR_ADDU t0, a1, v0
48 xor t0, a1
49 bltz t0, fault
50 jr ra # return n
51 END(__strncpy_from_user_asm)
52
53fault: li v0, -EFAULT
54 jr ra
55
56 .section __ex_table,"a"
57 PTR 1b, fault
58 .previous
diff --git a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S
new file mode 100644
index 000000000000..6e7a8eed4de8
--- /dev/null
+++ b/arch/mips/lib/strnlen_user.S
@@ -0,0 +1,45 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 1996, 1998, 1999, 2004 by Ralf Baechle
7 * Copyright (c) 1999 Silicon Graphics, Inc.
8 */
9#include <asm/asm.h>
10#include <asm/offset.h>
11#include <asm/regdef.h>
12
13#define EX(insn,reg,addr,handler) \
149: insn reg, addr; \
15 .section __ex_table,"a"; \
16 PTR 9b, handler; \
17 .previous
18
19/*
20 * Return the size of a string including the ending NUL character upto a
21 * maximum of a1 or 0 in case of error.
22 *
23 * Note: for performance reasons we deliberately accept that a user may
24 * make strlen_user and strnlen_user access the first few KSEG0
25 * bytes. There's nothing secret there. On 64-bit accessing beyond
26 * the maximum is a tad hairier ...
27 */
28LEAF(__strnlen_user_asm)
29 LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
30 and v0, a0
31 bnez v0, fault
32
33FEXPORT(__strnlen_user_nocheck_asm)
34 move v0, a0
35 PTR_ADDU a1, a0 # stop pointer
361: beq v0, a1, 1f # limit reached?
37 EX(lb, t0, (v0), fault)
38 PTR_ADDU v0, 1
39 bnez t0, 1b
401: PTR_SUBU v0, a0
41 jr ra
42 END(__strnlen_user_asm)
43
44fault: move v0, zero
45 jr ra