diff options
Diffstat (limited to 'arch/mips/lib/iomap.c')
-rw-r--r-- | arch/mips/lib/iomap.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c index e3acb2dad33a..8e7e378ce51c 100644 --- a/arch/mips/lib/iomap.c +++ b/arch/mips/lib/iomap.c | |||
@@ -97,14 +97,14 @@ EXPORT_SYMBOL(iowrite32be); | |||
97 | 97 | ||
98 | /* | 98 | /* |
99 | * These are the "repeat MMIO read/write" functions. | 99 | * These are the "repeat MMIO read/write" functions. |
100 | * Note the "__raw" accesses, since we don't want to | 100 | * Note the "__mem" accesses, since we want to convert |
101 | * convert to CPU byte order. We write in "IO byte | 101 | * to CPU byte order if the host bus happens to not match the |
102 | * order" (we also don't have IO barriers). | 102 | * endianness of PCI/ISA (see mach-generic/mangle-port.h). |
103 | */ | 103 | */ |
104 | static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) | 104 | static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) |
105 | { | 105 | { |
106 | while (--count >= 0) { | 106 | while (--count >= 0) { |
107 | u8 data = __raw_readb(addr); | 107 | u8 data = __mem_readb(addr); |
108 | *dst = data; | 108 | *dst = data; |
109 | dst++; | 109 | dst++; |
110 | } | 110 | } |
@@ -113,7 +113,7 @@ static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) | |||
113 | static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) | 113 | static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) |
114 | { | 114 | { |
115 | while (--count >= 0) { | 115 | while (--count >= 0) { |
116 | u16 data = __raw_readw(addr); | 116 | u16 data = __mem_readw(addr); |
117 | *dst = data; | 117 | *dst = data; |
118 | dst++; | 118 | dst++; |
119 | } | 119 | } |
@@ -122,7 +122,7 @@ static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) | |||
122 | static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) | 122 | static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) |
123 | { | 123 | { |
124 | while (--count >= 0) { | 124 | while (--count >= 0) { |
125 | u32 data = __raw_readl(addr); | 125 | u32 data = __mem_readl(addr); |
126 | *dst = data; | 126 | *dst = data; |
127 | dst++; | 127 | dst++; |
128 | } | 128 | } |
@@ -131,7 +131,7 @@ static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) | |||
131 | static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) | 131 | static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) |
132 | { | 132 | { |
133 | while (--count >= 0) { | 133 | while (--count >= 0) { |
134 | __raw_writeb(*src, addr); | 134 | __mem_writeb(*src, addr); |
135 | src++; | 135 | src++; |
136 | } | 136 | } |
137 | } | 137 | } |
@@ -139,7 +139,7 @@ static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) | |||
139 | static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) | 139 | static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) |
140 | { | 140 | { |
141 | while (--count >= 0) { | 141 | while (--count >= 0) { |
142 | __raw_writew(*src, addr); | 142 | __mem_writew(*src, addr); |
143 | src++; | 143 | src++; |
144 | } | 144 | } |
145 | } | 145 | } |
@@ -147,7 +147,7 @@ static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) | |||
147 | static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) | 147 | static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) |
148 | { | 148 | { |
149 | while (--count >= 0) { | 149 | while (--count >= 0) { |
150 | __raw_writel(*src, addr); | 150 | __mem_writel(*src, addr); |
151 | src++; | 151 | src++; |
152 | } | 152 | } |
153 | } | 153 | } |