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-rw-r--r--arch/mips/lib-32/dump_tlb.c222
1 files changed, 222 insertions, 0 deletions
diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
new file mode 100644
index 000000000000..019ac8f005d7
--- /dev/null
+++ b/arch/mips/lib-32/dump_tlb.c
@@ -0,0 +1,222 @@
1/*
2 * Dump R4x00 TLB for debugging purposes.
3 *
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7#include <linux/config.h>
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/sched.h>
11#include <linux/string.h>
12
13#include <asm/bootinfo.h>
14#include <asm/cachectl.h>
15#include <asm/cpu.h>
16#include <asm/mipsregs.h>
17#include <asm/page.h>
18#include <asm/pgtable.h>
19
20static inline const char *msk2str(unsigned int mask)
21{
22 switch (mask) {
23 case PM_4K: return "4kb";
24 case PM_16K: return "16kb";
25 case PM_64K: return "64kb";
26 case PM_256K: return "256kb";
27#ifndef CONFIG_CPU_VR41XX
28 case PM_1M: return "1Mb";
29 case PM_4M: return "4Mb";
30 case PM_16M: return "16Mb";
31 case PM_64M: return "64Mb";
32 case PM_256M: return "256Mb";
33#endif
34 }
35
36 return "unknown";
37}
38
39#define BARRIER() \
40 __asm__ __volatile__( \
41 ".set\tnoreorder\n\t" \
42 "nop;nop;nop;nop;nop;nop;nop\n\t" \
43 ".set\treorder");
44
45void dump_tlb(int first, int last)
46{
47 unsigned int pagemask, c0, c1, asid;
48 unsigned long long entrylo0, entrylo1;
49 unsigned long entryhi;
50 int i;
51
52 asid = read_c0_entryhi() & 0xff;
53
54 printk("\n");
55 for (i = first; i <= last; i++) {
56 write_c0_index(i);
57 BARRIER();
58 tlb_read();
59 BARRIER();
60 pagemask = read_c0_pagemask();
61 entryhi = read_c0_entryhi();
62 entrylo0 = read_c0_entrylo0();
63 entrylo1 = read_c0_entrylo1();
64
65 /* Unused entries have a virtual address in KSEG0. */
66 if ((entryhi & 0xf0000000) != 0x80000000
67 && (entryhi & 0xff) == asid) {
68 /*
69 * Only print entries in use
70 */
71 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
72
73 c0 = (entrylo0 >> 3) & 7;
74 c1 = (entrylo1 >> 3) & 7;
75
76 printk("va=%08lx asid=%02lx\n",
77 (entryhi & 0xffffe000), (entryhi & 0xff));
78 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
79 (entrylo0 << 6) & PAGE_MASK, c0,
80 (entrylo0 & 4) ? 1 : 0,
81 (entrylo0 & 2) ? 1 : 0,
82 (entrylo0 & 1));
83 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
84 (entrylo1 << 6) & PAGE_MASK, c1,
85 (entrylo1 & 4) ? 1 : 0,
86 (entrylo1 & 2) ? 1 : 0,
87 (entrylo1 & 1));
88 printk("\n");
89 }
90 }
91
92 write_c0_entryhi(asid);
93}
94
95void dump_tlb_all(void)
96{
97 dump_tlb(0, current_cpu_data.tlbsize - 1);
98}
99
100void dump_tlb_wired(void)
101{
102 int wired;
103
104 wired = read_c0_wired();
105 printk("Wired: %d", wired);
106 dump_tlb(0, read_c0_wired());
107}
108
109void dump_tlb_addr(unsigned long addr)
110{
111 unsigned int flags, oldpid;
112 int index;
113
114 local_irq_save(flags);
115 oldpid = read_c0_entryhi() & 0xff;
116 BARRIER();
117 write_c0_entryhi((addr & PAGE_MASK) | oldpid);
118 BARRIER();
119 tlb_probe();
120 BARRIER();
121 index = read_c0_index();
122 write_c0_entryhi(oldpid);
123 local_irq_restore(flags);
124
125 if (index < 0) {
126 printk("No entry for address 0x%08lx in TLB\n", addr);
127 return;
128 }
129
130 printk("Entry %d maps address 0x%08lx\n", index, addr);
131 dump_tlb(index, index);
132}
133
134void dump_tlb_nonwired(void)
135{
136 dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
137}
138
139void dump_list_process(struct task_struct *t, void *address)
140{
141 pgd_t *page_dir, *pgd;
142 pmd_t *pmd;
143 pte_t *pte, page;
144 unsigned long addr, val;
145
146 addr = (unsigned long) address;
147
148 printk("Addr == %08lx\n", addr);
149 printk("task == %8p\n", t);
150 printk("task->mm == %8p\n", t->mm);
151 //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
152
153 if (addr > KSEG0)
154 page_dir = pgd_offset_k(0);
155 else
156 page_dir = pgd_offset(t->mm, 0);
157 printk("page_dir == %08x\n", (unsigned int) page_dir);
158
159 if (addr > KSEG0)
160 pgd = pgd_offset_k(addr);
161 else
162 pgd = pgd_offset(t->mm, addr);
163 printk("pgd == %08x, ", (unsigned int) pgd);
164
165 pmd = pmd_offset(pgd, addr);
166 printk("pmd == %08x, ", (unsigned int) pmd);
167
168 pte = pte_offset(pmd, addr);
169 printk("pte == %08x, ", (unsigned int) pte);
170
171 page = *pte;
172#ifdef CONFIG_64BIT_PHYS_ADDR
173 printk("page == %08Lx\n", pte_val(page));
174#else
175 printk("page == %08lx\n", pte_val(page));
176#endif
177
178 val = pte_val(page);
179 if (val & _PAGE_PRESENT) printk("present ");
180 if (val & _PAGE_READ) printk("read ");
181 if (val & _PAGE_WRITE) printk("write ");
182 if (val & _PAGE_ACCESSED) printk("accessed ");
183 if (val & _PAGE_MODIFIED) printk("modified ");
184 if (val & _PAGE_R4KBUG) printk("r4kbug ");
185 if (val & _PAGE_GLOBAL) printk("global ");
186 if (val & _PAGE_VALID) printk("valid ");
187 printk("\n");
188}
189
190void dump_list_current(void *address)
191{
192 dump_list_process(current, address);
193}
194
195unsigned int vtop(void *address)
196{
197 pgd_t *pgd;
198 pmd_t *pmd;
199 pte_t *pte;
200 unsigned int addr, paddr;
201
202 addr = (unsigned long) address;
203 pgd = pgd_offset(current->mm, addr);
204 pmd = pmd_offset(pgd, addr);
205 pte = pte_offset(pmd, addr);
206 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
207 paddr |= (addr & ~PAGE_MASK);
208
209 return paddr;
210}
211
212void dump16(unsigned long *p)
213{
214 int i;
215
216 for (i = 0; i < 8; i++) {
217 printk("*%08lx == %08lx, ", (unsigned long)p, *p);
218 p++;
219 printk("*%08lx == %08lx\n", (unsigned long)p, *p);
220 p++;
221 }
222}