aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cevt-bcm1480.c2
-rw-r--r--arch/mips/kernel/cevt-ds1287.c2
-rw-r--r--arch/mips/kernel/cevt-gt641xx.c2
-rw-r--r--arch/mips/kernel/cevt-r4k.c2
-rw-r--r--arch/mips/kernel/cevt-sb1250.c2
-rw-r--r--arch/mips/kernel/cevt-smtc.c3
-rw-r--r--arch/mips/kernel/cevt-txx9.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c8
-rw-r--r--arch/mips/kernel/head.S1
-rw-r--r--arch/mips/kernel/i8253.c2
-rw-r--r--arch/mips/kernel/irq-gic.c114
-rw-r--r--arch/mips/kernel/kspd.c1
-rw-r--r--arch/mips/kernel/linux32.c86
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S3
-rw-r--r--arch/mips/kernel/scall64-o32.S7
-rw-r--r--arch/mips/kernel/smtc.c36
-rw-r--r--arch/mips/kernel/spram.c5
-rw-r--r--arch/mips/kernel/syscall.c36
-rw-r--r--arch/mips/kernel/time.c33
-rw-r--r--arch/mips/kernel/vpe.c2
22 files changed, 112 insertions, 239 deletions
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index e02f79b1eb51..bfea327c636c 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -144,7 +144,7 @@ void __cpuinit sb1480_clockevent_init(void)
144 bcm1480_unmask_irq(cpu, irq); 144 bcm1480_unmask_irq(cpu, irq);
145 145
146 action->handler = sibyte_counter_handler; 146 action->handler = sibyte_counter_handler;
147 action->flags = IRQF_DISABLED | IRQF_PERCPU; 147 action->flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER;
148 action->name = name; 148 action->name = name;
149 action->dev_id = cd; 149 action->dev_id = cd;
150 150
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index 6996da4d74a2..00a4da277cbb 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -107,7 +107,7 @@ static irqreturn_t ds1287_interrupt(int irq, void *dev_id)
107 107
108static struct irqaction ds1287_irqaction = { 108static struct irqaction ds1287_irqaction = {
109 .handler = ds1287_interrupt, 109 .handler = ds1287_interrupt,
110 .flags = IRQF_DISABLED | IRQF_PERCPU, 110 .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER,
111 .name = "ds1287", 111 .name = "ds1287",
112}; 112};
113 113
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index 92351e00ae0e..f5d265eb6eae 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -113,7 +113,7 @@ static irqreturn_t gt641xx_timer0_interrupt(int irq, void *dev_id)
113 113
114static struct irqaction gt641xx_timer0_irqaction = { 114static struct irqaction gt641xx_timer0_irqaction = {
115 .handler = gt641xx_timer0_interrupt, 115 .handler = gt641xx_timer0_interrupt,
116 .flags = IRQF_DISABLED | IRQF_PERCPU, 116 .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER,
117 .name = "gt641xx_timer0", 117 .name = "gt641xx_timer0",
118}; 118};
119 119
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 2652362ce047..b469ad05d520 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -83,7 +83,7 @@ out:
83 83
84struct irqaction c0_compare_irqaction = { 84struct irqaction c0_compare_irqaction = {
85 .handler = c0_compare_interrupt, 85 .handler = c0_compare_interrupt,
86 .flags = IRQF_DISABLED | IRQF_PERCPU, 86 .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER,
87 .name = "timer", 87 .name = "timer",
88}; 88};
89 89
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index ac5903d1b20e..da78eeaea6e8 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -143,7 +143,7 @@ void __cpuinit sb1250_clockevent_init(void)
143 sb1250_unmask_irq(cpu, irq); 143 sb1250_unmask_irq(cpu, irq);
144 144
145 action->handler = sibyte_counter_handler; 145 action->handler = sibyte_counter_handler;
146 action->flags = IRQF_DISABLED | IRQF_PERCPU; 146 action->flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER;
147 action->name = name; 147 action->name = name;
148 action->dev_id = cd; 148 action->dev_id = cd;
149 149
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 98bd7de75778..b102e4f1630e 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -173,11 +173,12 @@ void smtc_distribute_timer(int vpe)
173 unsigned int mtflags; 173 unsigned int mtflags;
174 int cpu; 174 int cpu;
175 struct clock_event_device *cd; 175 struct clock_event_device *cd;
176 unsigned long nextstamp = 0L; 176 unsigned long nextstamp;
177 unsigned long reference; 177 unsigned long reference;
178 178
179 179
180repeat: 180repeat:
181 nextstamp = 0L;
181 for_each_online_cpu(cpu) { 182 for_each_online_cpu(cpu) {
182 /* 183 /*
183 * Find virtual CPUs within the current VPE who have 184 * Find virtual CPUs within the current VPE who have
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 0037f21baf0d..218ee6bda935 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -146,7 +146,7 @@ static irqreturn_t txx9tmr_interrupt(int irq, void *dev_id)
146 146
147static struct irqaction txx9tmr_irq = { 147static struct irqaction txx9tmr_irq = {
148 .handler = txx9tmr_interrupt, 148 .handler = txx9tmr_interrupt,
149 .flags = IRQF_DISABLED | IRQF_PERCPU, 149 .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER,
150 .name = "txx9tmr", 150 .name = "txx9tmr",
151 .dev_id = &txx9_clock_event_device, 151 .dev_id = &txx9_clock_event_device,
152}; 152};
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f709657e4dcd..7a51866068a4 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -23,7 +23,7 @@
23#include <asm/mipsregs.h> 23#include <asm/mipsregs.h>
24#include <asm/system.h> 24#include <asm/system.h>
25#include <asm/watch.h> 25#include <asm/watch.h>
26 26#include <asm/spram.h>
27/* 27/*
28 * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, 28 * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
29 * the implementation of the "wait" feature differs between CPU families. This 29 * the implementation of the "wait" feature differs between CPU families. This
@@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
711 mips_probe_watch_registers(c); 711 mips_probe_watch_registers(c);
712} 712}
713 713
714#ifdef CONFIG_CPU_MIPSR2
715extern void spram_config(void);
716#else
717static inline void spram_config(void) {}
718#endif
719
720static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) 714static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
721{ 715{
722 decode_configs(c); 716 decode_configs(c);
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 531ce7b16124..ea695d9605e9 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -191,6 +191,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
191 /* Set the SP after an empty pt_regs. */ 191 /* Set the SP after an empty pt_regs. */
192 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE 192 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
193 PTR_ADDU sp, $28 193 PTR_ADDU sp, $28
194 back_to_back_c0_hazard
194 set_saved_sp sp, t0, t1 195 set_saved_sp sp, t0, t1
195 PTR_SUBU sp, 4 * SZREG # init stack pointer 196 PTR_SUBU sp, 4 * SZREG # init stack pointer
196 197
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index f7d8d5d0ddbf..ed5c441615e4 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -98,7 +98,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
98 98
99static struct irqaction irq0 = { 99static struct irqaction irq0 = {
100 .handler = timer_interrupt, 100 .handler = timer_interrupt,
101 .flags = IRQF_DISABLED | IRQF_NOBALANCING, 101 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
102 .name = "timer" 102 .name = "timer"
103}; 103};
104 104
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index d2072cd38592..b181f2f0ea8e 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -14,38 +14,23 @@
14 14
15 15
16static unsigned long _gic_base; 16static unsigned long _gic_base;
17static unsigned int _irqbase, _mapsize, numvpes, numintrs; 17static unsigned int _irqbase;
18static struct gic_intr_map *_intrmap; 18static unsigned int gic_irq_flags[GIC_NUM_INTRS];
19#define GIC_IRQ_FLAG_EDGE 0x0001
19 20
20static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; 21struct gic_pcpu_mask pcpu_masks[NR_CPUS];
21static struct gic_pending_regs pending_regs[NR_CPUS]; 22static struct gic_pending_regs pending_regs[NR_CPUS];
22static struct gic_intrmask_regs intrmask_regs[NR_CPUS]; 23static struct gic_intrmask_regs intrmask_regs[NR_CPUS];
23 24
24#define gic_wedgeb2bok 0 /*
25 * Can GIC handle b2b writes to wedge register?
26 */
27#if gic_wedgeb2bok == 0
28static DEFINE_SPINLOCK(gic_wedgeb2b_lock);
29#endif
30
31void gic_send_ipi(unsigned int intr) 25void gic_send_ipi(unsigned int intr)
32{ 26{
33#if gic_wedgeb2bok == 0
34 unsigned long flags;
35#endif
36 pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__, 27 pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__,
37 read_c0_status()); 28 read_c0_status());
38 if (!gic_wedgeb2bok)
39 spin_lock_irqsave(&gic_wedgeb2b_lock, flags);
40 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr); 29 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr);
41 if (!gic_wedgeb2bok) {
42 (void) GIC_REG(SHARED, GIC_SH_CONFIG);
43 spin_unlock_irqrestore(&gic_wedgeb2b_lock, flags);
44 }
45} 30}
46 31
47/* This is Malta specific and needs to be exported */ 32/* This is Malta specific and needs to be exported */
48static void vpe_local_setup(unsigned int numvpes) 33static void __init vpe_local_setup(unsigned int numvpes)
49{ 34{
50 int i; 35 int i;
51 unsigned long timer_interrupt = 5, perf_interrupt = 5; 36 unsigned long timer_interrupt = 5, perf_interrupt = 5;
@@ -105,44 +90,34 @@ unsigned int gic_get_int(void)
105 90
106static unsigned int gic_irq_startup(unsigned int irq) 91static unsigned int gic_irq_startup(unsigned int irq)
107{ 92{
108 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
109 irq -= _irqbase; 93 irq -= _irqbase;
110 GIC_SET_INTR_MASK(irq, 1); 94 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
95 GIC_SET_INTR_MASK(irq);
111 return 0; 96 return 0;
112} 97}
113 98
114static void gic_irq_ack(unsigned int irq) 99static void gic_irq_ack(unsigned int irq)
115{ 100{
116#if gic_wedgeb2bok == 0
117 unsigned long flags;
118#endif
119 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
120 irq -= _irqbase; 101 irq -= _irqbase;
121 GIC_CLR_INTR_MASK(irq, 1); 102 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
103 GIC_CLR_INTR_MASK(irq);
122 104
123 if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) { 105 if (gic_irq_flags[irq] & GIC_IRQ_FLAG_EDGE)
124 if (!gic_wedgeb2bok)
125 spin_lock_irqsave(&gic_wedgeb2b_lock, flags);
126 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); 106 GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
127 if (!gic_wedgeb2bok) {
128 (void) GIC_REG(SHARED, GIC_SH_CONFIG);
129 spin_unlock_irqrestore(&gic_wedgeb2b_lock, flags);
130 }
131 }
132} 107}
133 108
134static void gic_mask_irq(unsigned int irq) 109static void gic_mask_irq(unsigned int irq)
135{ 110{
136 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
137 irq -= _irqbase; 111 irq -= _irqbase;
138 GIC_CLR_INTR_MASK(irq, 1); 112 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
113 GIC_CLR_INTR_MASK(irq);
139} 114}
140 115
141static void gic_unmask_irq(unsigned int irq) 116static void gic_unmask_irq(unsigned int irq)
142{ 117{
143 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
144 irq -= _irqbase; 118 irq -= _irqbase;
145 GIC_SET_INTR_MASK(irq, 1); 119 pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
120 GIC_SET_INTR_MASK(irq);
146} 121}
147 122
148#ifdef CONFIG_SMP 123#ifdef CONFIG_SMP
@@ -155,9 +130,8 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
155 unsigned long flags; 130 unsigned long flags;
156 int i; 131 int i;
157 132
158 pr_debug(KERN_DEBUG "%s called\n", __func__);
159 irq -= _irqbase; 133 irq -= _irqbase;
160 134 pr_debug(KERN_DEBUG "%s(%d) called\n", __func__, irq);
161 cpumask_and(&tmp, cpumask, cpu_online_mask); 135 cpumask_and(&tmp, cpumask, cpu_online_mask);
162 if (cpus_empty(tmp)) 136 if (cpus_empty(tmp))
163 return -1; 137 return -1;
@@ -168,13 +142,6 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
168 /* Re-route this IRQ */ 142 /* Re-route this IRQ */
169 GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp)); 143 GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
170 144
171 /*
172 * FIXME: assumption that _intrmap is ordered and has no holes
173 */
174
175 /* Update the intr_map */
176 _intrmap[irq].cpunum = first_cpu(tmp);
177
178 /* Update the pcpu_masks */ 145 /* Update the pcpu_masks */
179 for (i = 0; i < NR_CPUS; i++) 146 for (i = 0; i < NR_CPUS; i++)
180 clear_bit(irq, pcpu_masks[i].pcpu_mask); 147 clear_bit(irq, pcpu_masks[i].pcpu_mask);
@@ -201,8 +168,9 @@ static struct irq_chip gic_irq_controller = {
201#endif 168#endif
202}; 169};
203 170
204static void __init setup_intr(unsigned int intr, unsigned int cpu, 171static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
205 unsigned int pin, unsigned int polarity, unsigned int trigtype) 172 unsigned int pin, unsigned int polarity, unsigned int trigtype,
173 unsigned int flags)
206{ 174{
207 /* Setup Intr to Pin mapping */ 175 /* Setup Intr to Pin mapping */
208 if (pin & GIC_MAP_TO_NMI_MSK) { 176 if (pin & GIC_MAP_TO_NMI_MSK) {
@@ -227,38 +195,43 @@ static void __init setup_intr(unsigned int intr, unsigned int cpu,
227 GIC_SET_TRIGGER(intr, trigtype); 195 GIC_SET_TRIGGER(intr, trigtype);
228 196
229 /* Init Intr Masks */ 197 /* Init Intr Masks */
230 GIC_SET_INTR_MASK(intr, 0); 198 GIC_CLR_INTR_MASK(intr);
199 /* Initialise per-cpu Interrupt software masks */
200 if (flags & GIC_FLAG_IPI)
201 set_bit(intr, pcpu_masks[cpu].pcpu_mask);
202 if (flags & GIC_FLAG_TRANSPARENT)
203 GIC_SET_INTR_MASK(intr);
204 if (trigtype == GIC_TRIG_EDGE)
205 gic_irq_flags[intr] |= GIC_IRQ_FLAG_EDGE;
231} 206}
232 207
233static void __init gic_basic_init(void) 208static void __init gic_basic_init(int numintrs, int numvpes,
209 struct gic_intr_map *intrmap, int mapsize)
234{ 210{
235 unsigned int i, cpu; 211 unsigned int i, cpu;
236 212
237 /* Setup defaults */ 213 /* Setup defaults */
238 for (i = 0; i < GIC_NUM_INTRS; i++) { 214 for (i = 0; i < numintrs; i++) {
239 GIC_SET_POLARITY(i, GIC_POL_POS); 215 GIC_SET_POLARITY(i, GIC_POL_POS);
240 GIC_SET_TRIGGER(i, GIC_TRIG_LEVEL); 216 GIC_SET_TRIGGER(i, GIC_TRIG_LEVEL);
241 GIC_SET_INTR_MASK(i, 0); 217 GIC_CLR_INTR_MASK(i);
218 if (i < GIC_NUM_INTRS)
219 gic_irq_flags[i] = 0;
242 } 220 }
243 221
244 /* Setup specifics */ 222 /* Setup specifics */
245 for (i = 0; i < _mapsize; i++) { 223 for (i = 0; i < mapsize; i++) {
246 cpu = _intrmap[i].cpunum; 224 cpu = intrmap[i].cpunum;
247 if (cpu == X) 225 if (cpu == X)
248 continue; 226 continue;
249 227 if (cpu == 0 && i != 0 && intrmap[i].flags == 0)
250 if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 &&
251 _intrmap[i].ipiflag == 0)
252 continue; 228 continue;
253 229 gic_setup_intr(i,
254 setup_intr(_intrmap[i].intrnum, 230 intrmap[i].cpunum,
255 _intrmap[i].cpunum, 231 intrmap[i].pin,
256 _intrmap[i].pin, 232 intrmap[i].polarity,
257 _intrmap[i].polarity, 233 intrmap[i].trigtype,
258 _intrmap[i].trigtype); 234 intrmap[i].flags);
259 /* Initialise per-cpu Interrupt software masks */
260 if (_intrmap[i].ipiflag)
261 set_bit(_intrmap[i].intrnum, pcpu_masks[cpu].pcpu_mask);
262 } 235 }
263 236
264 vpe_local_setup(numvpes); 237 vpe_local_setup(numvpes);
@@ -273,12 +246,11 @@ void __init gic_init(unsigned long gic_base_addr,
273 unsigned int irqbase) 246 unsigned int irqbase)
274{ 247{
275 unsigned int gicconfig; 248 unsigned int gicconfig;
249 int numvpes, numintrs;
276 250
277 _gic_base = (unsigned long) ioremap_nocache(gic_base_addr, 251 _gic_base = (unsigned long) ioremap_nocache(gic_base_addr,
278 gic_addrspace_size); 252 gic_addrspace_size);
279 _irqbase = irqbase; 253 _irqbase = irqbase;
280 _intrmap = intr_map;
281 _mapsize = intr_map_size;
282 254
283 GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig); 255 GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
284 numintrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >> 256 numintrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >>
@@ -290,5 +262,5 @@ void __init gic_init(unsigned long gic_base_addr,
290 262
291 pr_debug("%s called\n", __func__); 263 pr_debug("%s called\n", __func__);
292 264
293 gic_basic_init(); 265 gic_basic_init(numintrs, numvpes, intr_map, intr_map_size);
294} 266}
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index ad4e017ed2f3..80e2ba694bab 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -82,6 +82,7 @@ static int sp_stopping;
82#define MTSP_O_SHLOCK 0x0010 82#define MTSP_O_SHLOCK 0x0010
83#define MTSP_O_EXLOCK 0x0020 83#define MTSP_O_EXLOCK 0x0020
84#define MTSP_O_ASYNC 0x0040 84#define MTSP_O_ASYNC 0x0040
85/* XXX: check which of these is actually O_SYNC vs O_DSYNC */
85#define MTSP_O_FSYNC O_SYNC 86#define MTSP_O_FSYNC O_SYNC
86#define MTSP_O_NOFOLLOW 0x0100 87#define MTSP_O_NOFOLLOW 0x0100
87#define MTSP_O_SYNC 0x0080 88#define MTSP_O_SYNC 0x0080
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 6242bc68add7..f042563c924f 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -67,28 +67,13 @@ SYSCALL_DEFINE6(32_mmap2, unsigned long, addr, unsigned long, len,
67 unsigned long, prot, unsigned long, flags, unsigned long, fd, 67 unsigned long, prot, unsigned long, flags, unsigned long, fd,
68 unsigned long, pgoff) 68 unsigned long, pgoff)
69{ 69{
70 struct file * file = NULL;
71 unsigned long error; 70 unsigned long error;
72 71
73 error = -EINVAL; 72 error = -EINVAL;
74 if (pgoff & (~PAGE_MASK >> 12)) 73 if (pgoff & (~PAGE_MASK >> 12))
75 goto out; 74 goto out;
76 pgoff >>= PAGE_SHIFT-12; 75 error = sys_mmap_pgoff(addr, len, prot, flags, fd,
77 76 pgoff >> (PAGE_SHIFT-12));
78 if (!(flags & MAP_ANONYMOUS)) {
79 error = -EBADF;
80 file = fget(fd);
81 if (!file)
82 goto out;
83 }
84 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
85
86 down_write(&current->mm->mmap_sem);
87 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
88 up_write(&current->mm->mmap_sem);
89 if (file)
90 fput(file);
91
92out: 77out:
93 return error; 78 return error;
94} 79}
@@ -265,67 +250,6 @@ SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz,
265} 250}
266#endif 251#endif
267 252
268struct sysctl_args32
269{
270 compat_caddr_t name;
271 int nlen;
272 compat_caddr_t oldval;
273 compat_caddr_t oldlenp;
274 compat_caddr_t newval;
275 compat_size_t newlen;
276 unsigned int __unused[4];
277};
278
279#ifdef CONFIG_SYSCTL_SYSCALL
280
281SYSCALL_DEFINE1(32_sysctl, struct sysctl_args32 __user *, args)
282{
283 struct sysctl_args32 tmp;
284 int error;
285 size_t oldlen;
286 size_t __user *oldlenp = NULL;
287 unsigned long addr = (((unsigned long)&args->__unused[0]) + 7) & ~7;
288
289 if (copy_from_user(&tmp, args, sizeof(tmp)))
290 return -EFAULT;
291
292 if (tmp.oldval && tmp.oldlenp) {
293 /* Duh, this is ugly and might not work if sysctl_args
294 is in read-only memory, but do_sysctl does indirectly
295 a lot of uaccess in both directions and we'd have to
296 basically copy the whole sysctl.c here, and
297 glibc's __sysctl uses rw memory for the structure
298 anyway. */
299 if (get_user(oldlen, (u32 __user *)A(tmp.oldlenp)) ||
300 put_user(oldlen, (size_t __user *)addr))
301 return -EFAULT;
302 oldlenp = (size_t __user *)addr;
303 }
304
305 lock_kernel();
306 error = do_sysctl((int __user *)A(tmp.name), tmp.nlen, (void __user *)A(tmp.oldval),
307 oldlenp, (void __user *)A(tmp.newval), tmp.newlen);
308 unlock_kernel();
309 if (oldlenp) {
310 if (!error) {
311 if (get_user(oldlen, (size_t __user *)addr) ||
312 put_user(oldlen, (u32 __user *)A(tmp.oldlenp)))
313 error = -EFAULT;
314 }
315 copy_to_user(args->__unused, tmp.__unused, sizeof(tmp.__unused));
316 }
317 return error;
318}
319
320#else
321
322SYSCALL_DEFINE1(32_sysctl, struct sysctl_args32 __user *, args)
323{
324 return -ENOSYS;
325}
326
327#endif /* CONFIG_SYSCTL_SYSCALL */
328
329SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name) 253SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name)
330{ 254{
331 int ret = 0; 255 int ret = 0;
@@ -428,3 +352,9 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs)
428 return do_fork(clone_flags, newsp, &regs, 0, 352 return do_fork(clone_flags, newsp, &regs, 0,
429 parent_tidptr, child_tidptr); 353 parent_tidptr, child_tidptr);
430} 354}
355
356asmlinkage long sys32_lookup_dcookie(u32 a0, u32 a1, char __user *buf,
357 size_t len)
358{
359 return sys_lookup_dcookie(merge_64(a0, a1), buf, len);
360}
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index fd2a9bb620d6..17202bbe843f 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -583,6 +583,7 @@ einval: li v0, -ENOSYS
583 sys sys_rt_tgsigqueueinfo 4 583 sys sys_rt_tgsigqueueinfo 4
584 sys sys_perf_event_open 5 584 sys sys_perf_event_open 5
585 sys sys_accept4 4 585 sys sys_accept4 4
586 sys sys_recvmmsg 5
586 .endm 587 .endm
587 588
588 /* We pre-compute the number of _instruction_ bytes needed to 589 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 18bf7f32c5e4..a8a6c596eb04 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -420,4 +420,5 @@ sys_call_table:
420 PTR sys_rt_tgsigqueueinfo 420 PTR sys_rt_tgsigqueueinfo
421 PTR sys_perf_event_open 421 PTR sys_perf_event_open
422 PTR sys_accept4 422 PTR sys_accept4
423 PTR sys_recvmmsg
423 .size sys_call_table,.-sys_call_table 424 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6ebc07976694..66b5a48676dd 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -272,7 +272,7 @@ EXPORT(sysn32_call_table)
272 PTR sys_munlockall 272 PTR sys_munlockall
273 PTR sys_vhangup /* 6150 */ 273 PTR sys_vhangup /* 6150 */
274 PTR sys_pivot_root 274 PTR sys_pivot_root
275 PTR sys_32_sysctl 275 PTR compat_sys_sysctl
276 PTR sys_prctl 276 PTR sys_prctl
277 PTR compat_sys_adjtimex 277 PTR compat_sys_adjtimex
278 PTR compat_sys_setrlimit /* 6155 */ 278 PTR compat_sys_setrlimit /* 6155 */
@@ -418,4 +418,5 @@ EXPORT(sysn32_call_table)
418 PTR compat_sys_rt_tgsigqueueinfo /* 5295 */ 418 PTR compat_sys_rt_tgsigqueueinfo /* 5295 */
419 PTR sys_perf_event_open 419 PTR sys_perf_event_open
420 PTR sys_accept4 420 PTR sys_accept4
421 PTR compat_sys_recvmmsg
421 .size sysn32_call_table,.-sysn32_call_table 422 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 9bbf9775e0bd..515f9eab2b28 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -356,7 +356,7 @@ sys_call_table:
356 PTR sys_ni_syscall /* 4150 */ 356 PTR sys_ni_syscall /* 4150 */
357 PTR sys_getsid 357 PTR sys_getsid
358 PTR sys_fdatasync 358 PTR sys_fdatasync
359 PTR sys_32_sysctl 359 PTR compat_sys_sysctl
360 PTR sys_mlock 360 PTR sys_mlock
361 PTR sys_munlock /* 4155 */ 361 PTR sys_munlock /* 4155 */
362 PTR sys_mlockall 362 PTR sys_mlockall
@@ -450,7 +450,7 @@ sys_call_table:
450 PTR sys_io_submit 450 PTR sys_io_submit
451 PTR sys_io_cancel /* 4245 */ 451 PTR sys_io_cancel /* 4245 */
452 PTR sys_exit_group 452 PTR sys_exit_group
453 PTR sys_lookup_dcookie 453 PTR sys32_lookup_dcookie
454 PTR sys_epoll_create 454 PTR sys_epoll_create
455 PTR sys_epoll_ctl 455 PTR sys_epoll_ctl
456 PTR sys_epoll_wait /* 4250 */ 456 PTR sys_epoll_wait /* 4250 */
@@ -505,7 +505,7 @@ sys_call_table:
505 PTR sys_fchmodat 505 PTR sys_fchmodat
506 PTR sys_faccessat /* 4300 */ 506 PTR sys_faccessat /* 4300 */
507 PTR compat_sys_pselect6 507 PTR compat_sys_pselect6
508 PTR sys_ppoll 508 PTR compat_sys_ppoll
509 PTR sys_unshare 509 PTR sys_unshare
510 PTR sys_splice 510 PTR sys_splice
511 PTR sys32_sync_file_range /* 4305 */ 511 PTR sys32_sync_file_range /* 4305 */
@@ -538,4 +538,5 @@ sys_call_table:
538 PTR compat_sys_rt_tgsigqueueinfo 538 PTR compat_sys_rt_tgsigqueueinfo
539 PTR sys_perf_event_open 539 PTR sys_perf_event_open
540 PTR sys_accept4 540 PTR sys_accept4
541 PTR compat_sys_recvmmsg
541 .size sys_call_table,.-sys_call_table 542 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 4d181df44a40..a38e3ee95515 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -75,7 +75,6 @@ unsigned long irq_hwmask[NR_IRQS];
75 75
76asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS]; 76asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS];
77 77
78
79/* 78/*
80 * Number of InterProcessor Interrupt (IPI) message buffers to allocate 79 * Number of InterProcessor Interrupt (IPI) message buffers to allocate
81 */ 80 */
@@ -388,6 +387,7 @@ void smtc_prepare_cpus(int cpus)
388 IPIQ[i].head = IPIQ[i].tail = NULL; 387 IPIQ[i].head = IPIQ[i].tail = NULL;
389 spin_lock_init(&IPIQ[i].lock); 388 spin_lock_init(&IPIQ[i].lock);
390 IPIQ[i].depth = 0; 389 IPIQ[i].depth = 0;
390 IPIQ[i].resched_flag = 0; /* No reschedules queued initially */
391 } 391 }
392 392
393 /* cpu_data index starts at zero */ 393 /* cpu_data index starts at zero */
@@ -741,11 +741,24 @@ void smtc_forward_irq(unsigned int irq)
741static void smtc_ipi_qdump(void) 741static void smtc_ipi_qdump(void)
742{ 742{
743 int i; 743 int i;
744 struct smtc_ipi *temp;
744 745
745 for (i = 0; i < NR_CPUS ;i++) { 746 for (i = 0; i < NR_CPUS ;i++) {
746 printk("IPIQ[%d]: head = 0x%x, tail = 0x%x, depth = %d\n", 747 pr_info("IPIQ[%d]: head = 0x%x, tail = 0x%x, depth = %d\n",
747 i, (unsigned)IPIQ[i].head, (unsigned)IPIQ[i].tail, 748 i, (unsigned)IPIQ[i].head, (unsigned)IPIQ[i].tail,
748 IPIQ[i].depth); 749 IPIQ[i].depth);
750 temp = IPIQ[i].head;
751
752 while (temp != IPIQ[i].tail) {
753 pr_debug("%d %d %d: ", temp->type, temp->dest,
754 (int)temp->arg);
755#ifdef SMTC_IPI_DEBUG
756 pr_debug("%u %lu\n", temp->sender, temp->stamp);
757#else
758 pr_debug("\n");
759#endif
760 temp = temp->flink;
761 }
749 } 762 }
750} 763}
751 764
@@ -784,11 +797,16 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
784 int mtflags; 797 int mtflags;
785 unsigned long tcrestart; 798 unsigned long tcrestart;
786 extern void r4k_wait_irqoff(void), __pastwait(void); 799 extern void r4k_wait_irqoff(void), __pastwait(void);
800 int set_resched_flag = (type == LINUX_SMP_IPI &&
801 action == SMP_RESCHEDULE_YOURSELF);
787 802
788 if (cpu == smp_processor_id()) { 803 if (cpu == smp_processor_id()) {
789 printk("Cannot Send IPI to self!\n"); 804 printk("Cannot Send IPI to self!\n");
790 return; 805 return;
791 } 806 }
807 if (set_resched_flag && IPIQ[cpu].resched_flag != 0)
808 return; /* There is a reschedule queued already */
809
792 /* Set up a descriptor, to be delivered either promptly or queued */ 810 /* Set up a descriptor, to be delivered either promptly or queued */
793 pipi = smtc_ipi_dq(&freeIPIq); 811 pipi = smtc_ipi_dq(&freeIPIq);
794 if (pipi == NULL) { 812 if (pipi == NULL) {
@@ -801,6 +819,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
801 pipi->dest = cpu; 819 pipi->dest = cpu;
802 if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) { 820 if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) {
803 /* If not on same VPE, enqueue and send cross-VPE interrupt */ 821 /* If not on same VPE, enqueue and send cross-VPE interrupt */
822 IPIQ[cpu].resched_flag |= set_resched_flag;
804 smtc_ipi_nq(&IPIQ[cpu], pipi); 823 smtc_ipi_nq(&IPIQ[cpu], pipi);
805 LOCK_CORE_PRA(); 824 LOCK_CORE_PRA();
806 settc(cpu_data[cpu].tc_id); 825 settc(cpu_data[cpu].tc_id);
@@ -847,6 +866,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
847 */ 866 */
848 write_tc_c0_tchalt(0); 867 write_tc_c0_tchalt(0);
849 UNLOCK_CORE_PRA(); 868 UNLOCK_CORE_PRA();
869 IPIQ[cpu].resched_flag |= set_resched_flag;
850 smtc_ipi_nq(&IPIQ[cpu], pipi); 870 smtc_ipi_nq(&IPIQ[cpu], pipi);
851 } else { 871 } else {
852postdirect: 872postdirect:
@@ -996,12 +1016,15 @@ void deferred_smtc_ipi(void)
996 * already enabled. 1016 * already enabled.
997 */ 1017 */
998 local_irq_save(flags); 1018 local_irq_save(flags);
999
1000 spin_lock(&q->lock); 1019 spin_lock(&q->lock);
1001 pipi = __smtc_ipi_dq(q); 1020 pipi = __smtc_ipi_dq(q);
1002 spin_unlock(&q->lock); 1021 spin_unlock(&q->lock);
1003 if (pipi != NULL) 1022 if (pipi != NULL) {
1023 if (pipi->type == LINUX_SMP_IPI &&
1024 (int)pipi->arg == SMP_RESCHEDULE_YOURSELF)
1025 IPIQ[cpu].resched_flag = 0;
1004 ipi_decode(pipi); 1026 ipi_decode(pipi);
1027 }
1005 /* 1028 /*
1006 * The use of the __raw_local restore isn't 1029 * The use of the __raw_local restore isn't
1007 * as obviously necessary here as in smtc_ipi_replay(), 1030 * as obviously necessary here as in smtc_ipi_replay(),
@@ -1082,6 +1105,9 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm)
1082 * with interrupts off 1105 * with interrupts off
1083 */ 1106 */
1084 local_irq_save(flags); 1107 local_irq_save(flags);
1108 if (pipi->type == LINUX_SMP_IPI &&
1109 (int)pipi->arg == SMP_RESCHEDULE_YOURSELF)
1110 IPIQ[cpu].resched_flag = 0;
1085 ipi_decode(pipi); 1111 ipi_decode(pipi);
1086 local_irq_restore(flags); 1112 local_irq_restore(flags);
1087 } 1113 }
@@ -1305,7 +1331,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
1305 if (!((asid += ASID_INC) & ASID_MASK) ) { 1331 if (!((asid += ASID_INC) & ASID_MASK) ) {
1306 if (cpu_has_vtag_icache) 1332 if (cpu_has_vtag_icache)
1307 flush_icache_all(); 1333 flush_icache_all();
1308 /* Traverse all online CPUs (hack requires contigous range) */ 1334 /* Traverse all online CPUs (hack requires contiguous range) */
1309 for_each_online_cpu(i) { 1335 for_each_online_cpu(i) {
1310 /* 1336 /*
1311 * We don't need to worry about our own CPU, nor those of 1337 * We don't need to worry about our own CPU, nor those of
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 6ddb507a87ef..1821d12a6410 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -13,7 +13,6 @@
13#include <linux/ptrace.h> 13#include <linux/ptrace.h>
14#include <linux/stddef.h> 14#include <linux/stddef.h>
15 15
16#include <asm/cpu.h>
17#include <asm/fpu.h> 16#include <asm/fpu.h>
18#include <asm/mipsregs.h> 17#include <asm/mipsregs.h>
19#include <asm/system.h> 18#include <asm/system.h>
@@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type,
198 offset += 2 * SPRAM_TAG_STRIDE; 197 offset += 2 * SPRAM_TAG_STRIDE;
199 } 198 }
200} 199}
201 200void __cpuinit spram_config(void)
202__cpuinit void spram_config(void)
203{ 201{
204 struct cpuinfo_mips *c = &current_cpu_data; 202 struct cpuinfo_mips *c = &current_cpu_data;
205 unsigned int config0; 203 unsigned int config0;
@@ -208,6 +206,7 @@ __cpuinit void spram_config(void)
208 case CPU_24K: 206 case CPU_24K:
209 case CPU_34K: 207 case CPU_34K:
210 case CPU_74K: 208 case CPU_74K:
209 case CPU_1004K:
211 config0 = read_c0_config(); 210 config0 = read_c0_config();
212 /* FIXME: addresses are Malta specific */ 211 /* FIXME: addresses are Malta specific */
213 if (config0 & (1<<24)) { 212 if (config0 & (1<<24)) {
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 3fe1fcfa2e73..3f7f466190b4 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -93,7 +93,8 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
93 * We do not accept a shared mapping if it would violate 93 * We do not accept a shared mapping if it would violate
94 * cache aliasing constraints. 94 * cache aliasing constraints.
95 */ 95 */
96 if ((flags & MAP_SHARED) && (addr & shm_align_mask)) 96 if ((flags & MAP_SHARED) &&
97 ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
97 return -EINVAL; 98 return -EINVAL;
98 return addr; 99 return addr;
99 } 100 }
@@ -129,31 +130,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
129 } 130 }
130} 131}
131 132
132/* common code for old and new mmaps */
133static inline unsigned long
134do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
135 unsigned long flags, unsigned long fd, unsigned long pgoff)
136{
137 unsigned long error = -EBADF;
138 struct file * file = NULL;
139
140 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
141 if (!(flags & MAP_ANONYMOUS)) {
142 file = fget(fd);
143 if (!file)
144 goto out;
145 }
146
147 down_write(&current->mm->mmap_sem);
148 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
149 up_write(&current->mm->mmap_sem);
150
151 if (file)
152 fput(file);
153out:
154 return error;
155}
156
157SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, 133SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
158 unsigned long, prot, unsigned long, flags, unsigned long, 134 unsigned long, prot, unsigned long, flags, unsigned long,
159 fd, off_t, offset) 135 fd, off_t, offset)
@@ -164,7 +140,7 @@ SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
164 if (offset & ~PAGE_MASK) 140 if (offset & ~PAGE_MASK)
165 goto out; 141 goto out;
166 142
167 result = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); 143 result = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
168 144
169out: 145out:
170 return result; 146 return result;
@@ -177,7 +153,7 @@ SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len,
177 if (pgoff & (~PAGE_MASK >> 12)) 153 if (pgoff & (~PAGE_MASK >> 12))
178 return -EINVAL; 154 return -EINVAL;
179 155
180 return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12)); 156 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12));
181} 157}
182 158
183save_static_function(sys_fork); 159save_static_function(sys_fork);
@@ -306,6 +282,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
306 282
307 if (cpu_has_llsc && R10000_LLSC_WAR) { 283 if (cpu_has_llsc && R10000_LLSC_WAR) {
308 __asm__ __volatile__ ( 284 __asm__ __volatile__ (
285 " .set mips3 \n"
309 " li %[err], 0 \n" 286 " li %[err], 0 \n"
310 "1: ll %[old], (%[addr]) \n" 287 "1: ll %[old], (%[addr]) \n"
311 " move %[tmp], %[new] \n" 288 " move %[tmp], %[new] \n"
@@ -320,6 +297,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
320 " "STR(PTR)" 1b, 4b \n" 297 " "STR(PTR)" 1b, 4b \n"
321 " "STR(PTR)" 2b, 4b \n" 298 " "STR(PTR)" 2b, 4b \n"
322 " .previous \n" 299 " .previous \n"
300 " .set mips0 \n"
323 : [old] "=&r" (old), 301 : [old] "=&r" (old),
324 [err] "=&r" (err), 302 [err] "=&r" (err),
325 [tmp] "=&r" (tmp) 303 [tmp] "=&r" (tmp)
@@ -329,6 +307,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
329 : "memory"); 307 : "memory");
330 } else if (cpu_has_llsc) { 308 } else if (cpu_has_llsc) {
331 __asm__ __volatile__ ( 309 __asm__ __volatile__ (
310 " .set mips3 \n"
332 " li %[err], 0 \n" 311 " li %[err], 0 \n"
333 "1: ll %[old], (%[addr]) \n" 312 "1: ll %[old], (%[addr]) \n"
334 " move %[tmp], %[new] \n" 313 " move %[tmp], %[new] \n"
@@ -347,6 +326,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
347 " "STR(PTR)" 1b, 5b \n" 326 " "STR(PTR)" 1b, 5b \n"
348 " "STR(PTR)" 2b, 5b \n" 327 " "STR(PTR)" 2b, 5b \n"
349 " .previous \n" 328 " .previous \n"
329 " .set mips0 \n"
350 : [old] "=&r" (old), 330 : [old] "=&r" (old),
351 [err] "=&r" (err), 331 [err] "=&r" (err),
352 [tmp] "=&r" (tmp) 332 [tmp] "=&r" (tmp)
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 1f467d534642..fb7497405510 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -71,39 +71,6 @@ EXPORT_SYMBOL(perf_irq);
71 71
72unsigned int mips_hpt_frequency; 72unsigned int mips_hpt_frequency;
73 73
74void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
75{
76 u64 temp;
77 u32 shift;
78
79 /* Find a shift value */
80 for (shift = 32; shift > 0; shift--) {
81 temp = (u64) NSEC_PER_SEC << shift;
82 do_div(temp, clock);
83 if ((temp >> 32) == 0)
84 break;
85 }
86 cs->shift = shift;
87 cs->mult = (u32) temp;
88}
89
90void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
91 unsigned int clock)
92{
93 u64 temp;
94 u32 shift;
95
96 /* Find a shift value */
97 for (shift = 32; shift > 0; shift--) {
98 temp = (u64) clock << shift;
99 do_div(temp, NSEC_PER_SEC);
100 if ((temp >> 32) == 0)
101 break;
102 }
103 cd->shift = shift;
104 cd->mult = (u32) temp;
105}
106
107/* 74/*
108 * This function exists in order to cause an error due to a duplicate 75 * This function exists in order to cause an error due to a duplicate
109 * definition if platform code should have its own implementation. The hook 76 * definition if platform code should have its own implementation. The hook
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 03092ab2a296..60477529362e 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1116,8 +1116,6 @@ static int vpe_open(struct inode *inode, struct file *filp)
1116 v->shared_ptr = NULL; 1116 v->shared_ptr = NULL;
1117 v->__start = 0; 1117 v->__start = 0;
1118 1118
1119 unlock_kernel();
1120
1121 return 0; 1119 return 0;
1122} 1120}
1123 1121
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 12:09:07 -0400