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-rw-r--r--arch/mips/kernel/asm-offsets.c3
-rw-r--r--arch/mips/kernel/entry.S1
-rw-r--r--arch/mips/kernel/genex.S15
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq-mv6434x.c6
-rw-r--r--arch/mips/kernel/irq.c6
-rw-r--r--arch/mips/kernel/rtlx.c6
-rw-r--r--arch/mips/kernel/smp-mt.c16
-rw-r--r--arch/mips/kernel/smtc.c26
-rw-r--r--arch/mips/kernel/time.c11
10 files changed, 46 insertions, 48 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index ec28077d5ee2..e9ce5b3721af 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -93,11 +93,12 @@ void output_thread_info_defines(void)
93 offset("#define TI_TASK ", struct thread_info, task); 93 offset("#define TI_TASK ", struct thread_info, task);
94 offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain); 94 offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain);
95 offset("#define TI_FLAGS ", struct thread_info, flags); 95 offset("#define TI_FLAGS ", struct thread_info, flags);
96 offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
96 offset("#define TI_CPU ", struct thread_info, cpu); 97 offset("#define TI_CPU ", struct thread_info, cpu);
97 offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count); 98 offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
98 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); 99 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
99 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); 100 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
100 offset("#define TI_TP_VALUE ", struct thread_info, tp_value); 101 offset("#define TI_REGS ", struct thread_info, regs);
101 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER); 102 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
102 constant("#define _THREAD_SIZE ", THREAD_SIZE); 103 constant("#define _THREAD_SIZE ", THREAD_SIZE);
103 constant("#define _THREAD_MASK ", THREAD_MASK); 104 constant("#define _THREAD_MASK ", THREAD_MASK);
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 766655f35250..e93e43e1f42d 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -79,7 +79,6 @@ FEXPORT(syscall_exit)
79FEXPORT(restore_all) # restore full frame 79FEXPORT(restore_all) # restore full frame
80#ifdef CONFIG_MIPS_MT_SMTC 80#ifdef CONFIG_MIPS_MT_SMTC
81/* Detect and execute deferred IPI "interrupts" */ 81/* Detect and execute deferred IPI "interrupts" */
82 move a0,sp
83 jal deferred_smtc_ipi 82 jal deferred_smtc_ipi
84/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 83/* Re-arm any temporarily masked interrupts not explicitly "acked" */
85 mfc0 v0, CP0_TCSTATUS 84 mfc0 v0, CP0_TCSTATUS
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index af6ef2fd8300..50ed77297728 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -131,9 +131,11 @@ NESTED(handle_int, PT_SIZE, sp)
131 CLI 131 CLI
132 TRACE_IRQS_OFF 132 TRACE_IRQS_OFF
133 133
134 PTR_LA ra, ret_from_irq 134 LONG_L s0, TI_REGS($28)
135 move a0, sp 135 LONG_S sp, TI_REGS($28)
136 j plat_irq_dispatch 136 jal plat_irq_dispatch
137 LONG_S s0, TI_REGS($28)
138 j ret_from_irq
137 END(handle_int) 139 END(handle_int)
138 140
139 __INIT 141 __INIT
@@ -219,9 +221,12 @@ NESTED(except_vec_vi_handler, 0, sp)
219#endif /* CONFIG_MIPS_MT_SMTC */ 221#endif /* CONFIG_MIPS_MT_SMTC */
220 CLI 222 CLI
221 TRACE_IRQS_OFF 223 TRACE_IRQS_OFF
222 move a0, sp 224
225 LONG_L s0, TI_REGS($28)
226 LONG_S sp, TI_REGS($28)
227 jalr v0
228 LONG_S s0, TI_REGS($28)
223 PTR_LA ra, ret_from_irq 229 PTR_LA ra, ret_from_irq
224 jr v0
225 END(except_vec_vi_handler) 230 END(except_vec_vi_handler)
226 231
227/* 232/*
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 63dfeb41796b..71e8e45f3687 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -115,14 +115,14 @@ static void end_msc_irq(unsigned int irq)
115/* 115/*
116 * Interrupt handler for interrupts coming from SOC-it. 116 * Interrupt handler for interrupts coming from SOC-it.
117 */ 117 */
118void ll_msc_irq(struct pt_regs *regs) 118void ll_msc_irq(void)
119{ 119{
120 unsigned int irq; 120 unsigned int irq;
121 121
122 /* read the interrupt vector register */ 122 /* read the interrupt vector register */
123 MSCIC_READ(MSC01_IC_VEC, irq); 123 MSCIC_READ(MSC01_IC_VEC, irq);
124 if (irq < 64) 124 if (irq < 64)
125 do_IRQ(irq + irq_base, regs); 125 do_IRQ(irq + irq_base);
126 else { 126 else {
127 /* Ignore spurious interrupt */ 127 /* Ignore spurious interrupt */
128 } 128 }
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index b117e64da64d..39c94fd8d8ba 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -113,7 +113,7 @@ static void end_mv64340_irq(unsigned int irq)
113 * Interrupt handler for interrupts coming from the Marvell chip. 113 * Interrupt handler for interrupts coming from the Marvell chip.
114 * It could be built in ethernet ports etc... 114 * It could be built in ethernet ports etc...
115 */ 115 */
116void ll_mv64340_irq(struct pt_regs *regs) 116void ll_mv64340_irq(void)
117{ 117{
118 unsigned int irq_src_low, irq_src_high; 118 unsigned int irq_src_low, irq_src_high;
119 unsigned int irq_mask_low, irq_mask_high; 119 unsigned int irq_mask_low, irq_mask_high;
@@ -129,9 +129,9 @@ void ll_mv64340_irq(struct pt_regs *regs)
129 irq_src_high &= irq_mask_high; 129 irq_src_high &= irq_mask_high;
130 130
131 if (irq_src_low) 131 if (irq_src_low)
132 do_IRQ(ls1bit32(irq_src_low) + irq_base, regs); 132 do_IRQ(ls1bit32(irq_src_low) + irq_base);
133 else 133 else
134 do_IRQ(ls1bit32(irq_src_high) + irq_base + 32, regs); 134 do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
135} 135}
136 136
137#define shutdown_mv64340_irq disable_mv64340_irq 137#define shutdown_mv64340_irq disable_mv64340_irq
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index a00b0e7ab9b1..dd24434392b6 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -53,9 +53,8 @@ unsigned long irq_hwmask[NR_IRQS];
53 * SMP cross-CPU interrupts have their own specific 53 * SMP cross-CPU interrupts have their own specific
54 * handlers). 54 * handlers).
55 */ 55 */
56asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs) 56asmlinkage unsigned int do_IRQ(unsigned int irq)
57{ 57{
58 struct pt_regs *old_regs = set_irq_regs(regs);
59 irq_enter(); 58 irq_enter();
60 59
61 __DO_IRQ_SMTC_HOOK(); 60 __DO_IRQ_SMTC_HOOK();
@@ -63,7 +62,6 @@ asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs)
63 62
64 irq_exit(); 63 irq_exit();
65 64
66 set_irq_regs(old_regs);
67 return 1; 65 return 1;
68} 66}
69 67
@@ -112,7 +110,7 @@ skip:
112 return 0; 110 return 0;
113} 111}
114 112
115asmlinkage void spurious_interrupt(struct pt_regs *regs) 113asmlinkage void spurious_interrupt(void)
116{ 114{
117 atomic_inc(&irq_err_count); 115 atomic_inc(&irq_err_count);
118} 116}
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index cdab1b2cd134..8c8c8324f775 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -61,16 +61,16 @@ static int sp_stopping = 0;
61 61
62extern void *vpe_get_shared(int index); 62extern void *vpe_get_shared(int index);
63 63
64static void rtlx_dispatch(struct pt_regs *regs) 64static void rtlx_dispatch(void)
65{ 65{
66 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs); 66 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ);
67} 67}
68 68
69 69
70/* Interrupt handler may be called before rtlx_init has otherwise had 70/* Interrupt handler may be called before rtlx_init has otherwise had
71 a chance to run. 71 a chance to run.
72*/ 72*/
73static irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs) 73static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
74{ 74{
75 int i; 75 int i;
76 76
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 766253c44f3f..3b5f3b632622 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -106,22 +106,22 @@ void __init sanitize_tlb_entries(void)
106 clear_c0_mvpcontrol(MVPCONTROL_VPC); 106 clear_c0_mvpcontrol(MVPCONTROL_VPC);
107} 107}
108 108
109static void ipi_resched_dispatch (struct pt_regs *regs) 109static void ipi_resched_dispatch(void)
110{ 110{
111 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ, regs); 111 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
112} 112}
113 113
114static void ipi_call_dispatch (struct pt_regs *regs) 114static void ipi_call_dispatch(void)
115{ 115{
116 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ, regs); 116 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ);
117} 117}
118 118
119irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs) 119static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
120{ 120{
121 return IRQ_HANDLED; 121 return IRQ_HANDLED;
122} 122}
123 123
124irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs) 124static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
125{ 125{
126 smp_call_function_interrupt(); 126 smp_call_function_interrupt();
127 127
@@ -250,8 +250,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
250{ 250{
251 /* set up ipi interrupts */ 251 /* set up ipi interrupts */
252 if (cpu_has_vint) { 252 if (cpu_has_vint) {
253 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); 253 set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
254 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); 254 set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
255 } 255 }
256 256
257 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; 257 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 604bcc5cb7c8..cc1f7474f7d7 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -82,7 +82,7 @@ struct smtc_ipi_q freeIPIq;
82 82
83/* Forward declarations */ 83/* Forward declarations */
84 84
85void ipi_decode(struct pt_regs *, struct smtc_ipi *); 85void ipi_decode(struct smtc_ipi *);
86void post_direct_ipi(int cpu, struct smtc_ipi *pipi); 86void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
87void setup_cross_vpe_interrupts(void); 87void setup_cross_vpe_interrupts(void);
88void init_smtc_stats(void); 88void init_smtc_stats(void);
@@ -820,19 +820,19 @@ void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
820 write_tc_c0_tcrestart(__smtc_ipi_vector); 820 write_tc_c0_tcrestart(__smtc_ipi_vector);
821} 821}
822 822
823void ipi_resched_interrupt(struct pt_regs *regs) 823static void ipi_resched_interrupt(void)
824{ 824{
825 /* Return from interrupt should be enough to cause scheduler check */ 825 /* Return from interrupt should be enough to cause scheduler check */
826} 826}
827 827
828 828
829void ipi_call_interrupt(struct pt_regs *regs) 829static void ipi_call_interrupt(void)
830{ 830{
831 /* Invoke generic function invocation code in smp.c */ 831 /* Invoke generic function invocation code in smp.c */
832 smp_call_function_interrupt(); 832 smp_call_function_interrupt();
833} 833}
834 834
835void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi) 835void ipi_decode(struct smtc_ipi *pipi)
836{ 836{
837 void *arg_copy = pipi->arg; 837 void *arg_copy = pipi->arg;
838 int type_copy = pipi->type; 838 int type_copy = pipi->type;
@@ -846,15 +846,15 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
846#ifdef SMTC_IDLE_HOOK_DEBUG 846#ifdef SMTC_IDLE_HOOK_DEBUG
847 clock_hang_reported[dest_copy] = 0; 847 clock_hang_reported[dest_copy] = 0;
848#endif /* SMTC_IDLE_HOOK_DEBUG */ 848#endif /* SMTC_IDLE_HOOK_DEBUG */
849 local_timer_interrupt(0, NULL, regs); 849 local_timer_interrupt(0, NULL);
850 break; 850 break;
851 case LINUX_SMP_IPI: 851 case LINUX_SMP_IPI:
852 switch ((int)arg_copy) { 852 switch ((int)arg_copy) {
853 case SMP_RESCHEDULE_YOURSELF: 853 case SMP_RESCHEDULE_YOURSELF:
854 ipi_resched_interrupt(regs); 854 ipi_resched_interrupt();
855 break; 855 break;
856 case SMP_CALL_FUNCTION: 856 case SMP_CALL_FUNCTION:
857 ipi_call_interrupt(regs); 857 ipi_call_interrupt();
858 break; 858 break;
859 default: 859 default:
860 printk("Impossible SMTC IPI Argument 0x%x\n", 860 printk("Impossible SMTC IPI Argument 0x%x\n",
@@ -868,7 +868,7 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
868 } 868 }
869} 869}
870 870
871void deferred_smtc_ipi(struct pt_regs *regs) 871void deferred_smtc_ipi(void)
872{ 872{
873 struct smtc_ipi *pipi; 873 struct smtc_ipi *pipi;
874 unsigned long flags; 874 unsigned long flags;
@@ -883,7 +883,7 @@ void deferred_smtc_ipi(struct pt_regs *regs)
883 while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) { 883 while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {
884 /* ipi_decode() should be called with interrupts off */ 884 /* ipi_decode() should be called with interrupts off */
885 local_irq_save(flags); 885 local_irq_save(flags);
886 ipi_decode(regs, pipi); 886 ipi_decode(pipi);
887 local_irq_restore(flags); 887 local_irq_restore(flags);
888 } 888 }
889 } 889 }
@@ -917,7 +917,7 @@ void smtc_timer_broadcast(int vpe)
917 917
918static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; 918static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ;
919 919
920static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs) 920static irqreturn_t ipi_interrupt(int irq, void *dev_idm)
921{ 921{
922 int my_vpe = cpu_data[smp_processor_id()].vpe_id; 922 int my_vpe = cpu_data[smp_processor_id()].vpe_id;
923 int my_tc = cpu_data[smp_processor_id()].tc_id; 923 int my_tc = cpu_data[smp_processor_id()].tc_id;
@@ -978,7 +978,7 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
978 * with interrupts off 978 * with interrupts off
979 */ 979 */
980 local_irq_save(flags); 980 local_irq_save(flags);
981 ipi_decode(regs, pipi); 981 ipi_decode(pipi);
982 local_irq_restore(flags); 982 local_irq_restore(flags);
983 } 983 }
984 } 984 }
@@ -987,9 +987,9 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
987 return IRQ_HANDLED; 987 return IRQ_HANDLED;
988} 988}
989 989
990static void ipi_irq_dispatch(struct pt_regs *regs) 990static void ipi_irq_dispatch(void)
991{ 991{
992 do_IRQ(cpu_ipi_irq, regs); 992 do_IRQ(cpu_ipi_irq);
993} 993}
994 994
995static struct irqaction irq_ipi; 995static struct irqaction irq_ipi;
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index d349eb9e4ffb..debe86c2f691 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -324,8 +324,7 @@ static long last_rtc_update;
324 */ 324 */
325void local_timer_interrupt(int irq, void *dev_id) 325void local_timer_interrupt(int irq, void *dev_id)
326{ 326{
327 if (current->pid) 327 profile_tick(CPU_PROFILING);
328 profile_tick(CPU_PROFILING);
329 update_process_times(user_mode(get_irq_regs())); 328 update_process_times(user_mode(get_irq_regs()));
330} 329}
331 330
@@ -434,9 +433,8 @@ int (*perf_irq)(void) = null_perf_irq;
434EXPORT_SYMBOL(null_perf_irq); 433EXPORT_SYMBOL(null_perf_irq);
435EXPORT_SYMBOL(perf_irq); 434EXPORT_SYMBOL(perf_irq);
436 435
437asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) 436asmlinkage void ll_timer_interrupt(int irq)
438{ 437{
439 struct pt_regs *old_regs = set_irq_regs(regs);
440 int r2 = cpu_has_mips_r2; 438 int r2 = cpu_has_mips_r2;
441 439
442 irq_enter(); 440 irq_enter();
@@ -458,12 +456,10 @@ asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
458 456
459out: 457out:
460 irq_exit(); 458 irq_exit();
461 set_irq_regs(old_regs);
462} 459}
463 460
464asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs) 461asmlinkage void ll_local_timer_interrupt(int irq)
465{ 462{
466 struct pt_regs *old_regs = set_irq_regs(regs);
467 irq_enter(); 463 irq_enter();
468 if (smp_processor_id() != 0) 464 if (smp_processor_id() != 0)
469 kstat_this_cpu.irqs[irq]++; 465 kstat_this_cpu.irqs[irq]++;
@@ -472,7 +468,6 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
472 local_timer_interrupt(irq, NULL); 468 local_timer_interrupt(irq, NULL);
473 469
474 irq_exit(); 470 irq_exit();
475 set_irq_regs(old_regs);
476} 471}
477 472
478/* 473/*