diff options
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 39 | ||||
| -rw-r--r-- | arch/mips/kernel/process.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/ptrace.c | 8 | ||||
| -rw-r--r-- | arch/mips/kernel/ptrace32.c | 8 | ||||
| -rw-r--r-- | arch/mips/kernel/signal32.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/time.c | 32 | ||||
| -rw-r--r-- | arch/mips/kernel/vpe.c | 8 |
7 files changed, 71 insertions, 30 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5e1b08b00a33..fac48ad27b34 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
| @@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) | |||
| 435 | } | 435 | } |
| 436 | } | 436 | } |
| 437 | 437 | ||
| 438 | static char unknown_isa[] __initdata = KERN_ERR \ | ||
| 439 | "Unsupported ISA type, c0.config0: %d."; | ||
| 440 | |||
| 438 | static inline unsigned int decode_config0(struct cpuinfo_mips *c) | 441 | static inline unsigned int decode_config0(struct cpuinfo_mips *c) |
| 439 | { | 442 | { |
| 440 | unsigned int config0; | 443 | unsigned int config0; |
| @@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) | |||
| 447 | isa = (config0 & MIPS_CONF_AT) >> 13; | 450 | isa = (config0 & MIPS_CONF_AT) >> 13; |
| 448 | switch (isa) { | 451 | switch (isa) { |
| 449 | case 0: | 452 | case 0: |
| 450 | c->isa_level = MIPS_CPU_ISA_M32; | 453 | switch ((config0 >> 10) & 7) { |
| 454 | case 0: | ||
| 455 | c->isa_level = MIPS_CPU_ISA_M32R1; | ||
| 456 | break; | ||
| 457 | case 1: | ||
| 458 | c->isa_level = MIPS_CPU_ISA_M32R2; | ||
| 459 | break; | ||
| 460 | default: | ||
| 461 | goto unknown; | ||
| 462 | } | ||
| 451 | break; | 463 | break; |
| 452 | case 2: | 464 | case 2: |
| 453 | c->isa_level = MIPS_CPU_ISA_M64; | 465 | switch ((config0 >> 10) & 7) { |
| 466 | case 0: | ||
| 467 | c->isa_level = MIPS_CPU_ISA_M64R1; | ||
| 468 | break; | ||
| 469 | case 1: | ||
| 470 | c->isa_level = MIPS_CPU_ISA_M64R2; | ||
| 471 | break; | ||
| 472 | default: | ||
| 473 | goto unknown; | ||
| 474 | } | ||
| 454 | break; | 475 | break; |
| 455 | default: | 476 | default: |
| 456 | panic("Unsupported ISA type, cp0.config0.at: %d.", isa); | 477 | goto unknown; |
| 457 | } | 478 | } |
| 458 | 479 | ||
| 459 | return config0 & MIPS_CONF_M; | 480 | return config0 & MIPS_CONF_M; |
| 481 | |||
| 482 | unknown: | ||
| 483 | panic(unknown_isa, config0); | ||
| 460 | } | 484 | } |
| 461 | 485 | ||
| 462 | static inline unsigned int decode_config1(struct cpuinfo_mips *c) | 486 | static inline unsigned int decode_config1(struct cpuinfo_mips *c) |
| @@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) | |||
| 568 | break; | 592 | break; |
| 569 | case PRID_IMP_34K: | 593 | case PRID_IMP_34K: |
| 570 | c->cputype = CPU_34K; | 594 | c->cputype = CPU_34K; |
| 571 | c->isa_level = MIPS_CPU_ISA_M32; | ||
| 572 | break; | 595 | break; |
| 573 | } | 596 | } |
| 574 | } | 597 | } |
| @@ -647,7 +670,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c) | |||
| 647 | switch (c->processor_id & 0xff00) { | 670 | switch (c->processor_id & 0xff00) { |
| 648 | case PRID_IMP_PR4450: | 671 | case PRID_IMP_PR4450: |
| 649 | c->cputype = CPU_PR4450; | 672 | c->cputype = CPU_PR4450; |
| 650 | c->isa_level = MIPS_CPU_ISA_M32; | 673 | c->isa_level = MIPS_CPU_ISA_M32R1; |
| 651 | break; | 674 | break; |
| 652 | default: | 675 | default: |
| 653 | panic("Unknown Philips Core!"); /* REVISIT: die? */ | 676 | panic("Unknown Philips Core!"); /* REVISIT: die? */ |
| @@ -690,8 +713,10 @@ __init void cpu_probe(void) | |||
| 690 | if (c->options & MIPS_CPU_FPU) { | 713 | if (c->options & MIPS_CPU_FPU) { |
| 691 | c->fpu_id = cpu_get_fpu_id(); | 714 | c->fpu_id = cpu_get_fpu_id(); |
| 692 | 715 | ||
| 693 | if (c->isa_level == MIPS_CPU_ISA_M32 || | 716 | if (c->isa_level == MIPS_CPU_ISA_M32R1 || |
| 694 | c->isa_level == MIPS_CPU_ISA_M64) { | 717 | c->isa_level == MIPS_CPU_ISA_M32R2 || |
| 718 | c->isa_level == MIPS_CPU_ISA_M64R1 || | ||
| 719 | c->isa_level == MIPS_CPU_ISA_M64R2) { | ||
| 695 | if (c->fpu_id & MIPS_FPIR_3D) | 720 | if (c->fpu_id & MIPS_FPIR_3D) |
| 696 | c->ases |= MIPS_ASE_MIPS3D; | 721 | c->ases |= MIPS_ASE_MIPS3D; |
| 697 | } | 722 | } |
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index dd725779d91f..0476a4dce14e 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c | |||
| @@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) | |||
| 205 | return 1; | 205 | return 1; |
| 206 | } | 206 | } |
| 207 | 207 | ||
| 208 | void dump_regs(elf_greg_t *gp, struct pt_regs *regs) | 208 | void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs) |
| 209 | { | 209 | { |
| 210 | int i; | 210 | int i; |
| 211 | 211 | ||
| @@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) | |||
| 231 | { | 231 | { |
| 232 | struct thread_info *ti = tsk->thread_info; | 232 | struct thread_info *ti = tsk->thread_info; |
| 233 | long ksp = (unsigned long)ti + THREAD_SIZE - 32; | 233 | long ksp = (unsigned long)ti + THREAD_SIZE - 32; |
| 234 | dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); | 234 | elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); |
| 235 | return 1; | 235 | return 1; |
| 236 | } | 236 | } |
| 237 | 237 | ||
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 510da5fda567..8d2549335304 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
| @@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 280 | ret = -EIO; | 280 | ret = -EIO; |
| 281 | goto out; | 281 | goto out; |
| 282 | } | 282 | } |
| 283 | if (child->thread.dsp.used_dsp) { | 283 | dregs = __get_dsp_regs(child); |
| 284 | dregs = __get_dsp_regs(child); | 284 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
| 285 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); | ||
| 286 | } else { | ||
| 287 | tmp = -1; /* DSP registers yet used */ | ||
| 288 | } | ||
| 289 | break; | 285 | break; |
| 290 | } | 286 | } |
| 291 | case DSP_CONTROL: | 287 | case DSP_CONTROL: |
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 7e55457a491f..1f998bfde165 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c | |||
| @@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) | |||
| 201 | ret = -EIO; | 201 | ret = -EIO; |
| 202 | goto out_tsk; | 202 | goto out_tsk; |
| 203 | } | 203 | } |
| 204 | if (child->thread.dsp.used_dsp) { | 204 | dspreg_t *dregs = __get_dsp_regs(child); |
| 205 | dspreg_t *dregs = __get_dsp_regs(child); | 205 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
| 206 | tmp = (unsigned long) (dregs[addr - DSP_BASE]); | ||
| 207 | } else { | ||
| 208 | tmp = -1; /* DSP registers yet used */ | ||
| 209 | } | ||
| 210 | break; | 206 | break; |
| 211 | case DSP_CONTROL: | 207 | case DSP_CONTROL: |
| 212 | if (!cpu_has_dsp) { | 208 | if (!cpu_has_dsp) { |
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index c856dbc52abb..98b185bbc947 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
| @@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs, | |||
| 588 | err |= __put_user(regs->hi, &sc->sc_mdhi); | 588 | err |= __put_user(regs->hi, &sc->sc_mdhi); |
| 589 | err |= __put_user(regs->lo, &sc->sc_mdlo); | 589 | err |= __put_user(regs->lo, &sc->sc_mdlo); |
| 590 | if (cpu_has_dsp) { | 590 | if (cpu_has_dsp) { |
| 591 | err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1); | 591 | err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); |
| 592 | err |= __put_user(mfhi1(), &sc->sc_hi1); | 592 | err |= __put_user(mfhi1(), &sc->sc_hi1); |
| 593 | err |= __put_user(mflo1(), &sc->sc_lo1); | 593 | err |= __put_user(mflo1(), &sc->sc_lo1); |
| 594 | err |= __put_user(mfhi2(), &sc->sc_hi2); | 594 | err |= __put_user(mfhi2(), &sc->sc_hi2); |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 787ed541d442..7050b4ffffcd 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
| @@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
| 507 | return IRQ_HANDLED; | 507 | return IRQ_HANDLED; |
| 508 | } | 508 | } |
| 509 | 509 | ||
| 510 | int null_perf_irq(struct pt_regs *regs) | ||
| 511 | { | ||
| 512 | return 0; | ||
| 513 | } | ||
| 514 | |||
| 515 | int (*perf_irq)(struct pt_regs *regs) = null_perf_irq; | ||
| 516 | |||
| 517 | EXPORT_SYMBOL(null_perf_irq); | ||
| 518 | EXPORT_SYMBOL(perf_irq); | ||
| 519 | |||
| 510 | asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) | 520 | asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) |
| 511 | { | 521 | { |
| 522 | int r2 = cpu_has_mips_r2; | ||
| 523 | |||
| 512 | irq_enter(); | 524 | irq_enter(); |
| 513 | kstat_this_cpu.irqs[irq]++; | 525 | kstat_this_cpu.irqs[irq]++; |
| 514 | 526 | ||
| 527 | /* | ||
| 528 | * Suckage alert: | ||
| 529 | * Before R2 of the architecture there was no way to see if a | ||
| 530 | * performance counter interrupt was pending, so we have to run the | ||
| 531 | * performance counter interrupt handler anyway. | ||
| 532 | */ | ||
| 533 | if (!r2 || (read_c0_cause() & (1 << 26))) | ||
| 534 | if (perf_irq(regs)) | ||
| 535 | goto out; | ||
| 536 | |||
| 515 | /* we keep interrupt disabled all the time */ | 537 | /* we keep interrupt disabled all the time */ |
| 516 | timer_interrupt(irq, NULL, regs); | 538 | if (!r2 || (read_c0_cause() & (1 << 30))) |
| 539 | timer_interrupt(irq, NULL, regs); | ||
| 517 | 540 | ||
| 541 | out: | ||
| 518 | irq_exit(); | 542 | irq_exit(); |
| 519 | } | 543 | } |
| 520 | 544 | ||
| @@ -628,9 +652,9 @@ void __init time_init(void) | |||
| 628 | mips_hpt_init = c0_hpt_init; | 652 | mips_hpt_init = c0_hpt_init; |
| 629 | } | 653 | } |
| 630 | 654 | ||
| 631 | if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) || | 655 | if (cpu_has_mips32r1 || cpu_has_mips32r2 || |
| 632 | (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || | 656 | (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || |
| 633 | (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) | 657 | (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) |
| 634 | /* | 658 | /* |
| 635 | * We need to calibrate the counter but we don't have | 659 | * We need to calibrate the counter but we don't have |
| 636 | * 64-bit division. | 660 | * 64-bit division. |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 9c89eebc356f..ae83b755cf4a 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
| @@ -99,9 +99,9 @@ struct vpe { | |||
| 99 | 99 | ||
| 100 | /* elfloader stuff */ | 100 | /* elfloader stuff */ |
| 101 | void *load_addr; | 101 | void *load_addr; |
| 102 | u32 len; | 102 | unsigned long len; |
| 103 | char *pbuffer; | 103 | char *pbuffer; |
| 104 | u32 plen; | 104 | unsigned long plen; |
| 105 | 105 | ||
| 106 | unsigned long __start; | 106 | unsigned long __start; |
| 107 | 107 | ||
| @@ -253,11 +253,11 @@ void dump_mtregs(void) | |||
| 253 | } | 253 | } |
| 254 | 254 | ||
| 255 | /* Find some VPE program space */ | 255 | /* Find some VPE program space */ |
| 256 | static void *alloc_progmem(u32 len) | 256 | static void *alloc_progmem(unsigned long len) |
| 257 | { | 257 | { |
| 258 | #ifdef CONFIG_MIPS_VPE_LOADER_TOM | 258 | #ifdef CONFIG_MIPS_VPE_LOADER_TOM |
| 259 | /* this means you must tell linux to use less memory than you physically have */ | 259 | /* this means you must tell linux to use less memory than you physically have */ |
| 260 | return (void *)((max_pfn * PAGE_SIZE) + KSEG0); | 260 | return pfn_to_kaddr(max_pfn); |
| 261 | #else | 261 | #else |
| 262 | // simple grab some mem for now | 262 | // simple grab some mem for now |
| 263 | return kmalloc(len, GFP_KERNEL); | 263 | return kmalloc(len, GFP_KERNEL); |
