diff options
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r-- | arch/mips/kernel/traps.c | 59 |
1 files changed, 29 insertions, 30 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 7e9cb5b1b4a7..c598e890a880 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -752,6 +752,33 @@ asmlinkage void do_ri(struct pt_regs *regs) | |||
752 | force_sig(SIGILL, current); | 752 | force_sig(SIGILL, current); |
753 | } | 753 | } |
754 | 754 | ||
755 | /* | ||
756 | * MIPS MT processors may have fewer FPU contexts than CPU threads. If we've | ||
757 | * emulated more than some threshold number of instructions, force migration to | ||
758 | * a "CPU" that has FP support. | ||
759 | */ | ||
760 | static void mt_ase_fp_affinity(void) | ||
761 | { | ||
762 | #ifdef CONFIG_MIPS_MT_FPAFF | ||
763 | if (mt_fpemul_threshold > 0 && | ||
764 | ((current->thread.emulated_fp++ > mt_fpemul_threshold))) { | ||
765 | /* | ||
766 | * If there's no FPU present, or if the application has already | ||
767 | * restricted the allowed set to exclude any CPUs with FPUs, | ||
768 | * we'll skip the procedure. | ||
769 | */ | ||
770 | if (cpus_intersects(current->cpus_allowed, mt_fpu_cpumask)) { | ||
771 | cpumask_t tmask; | ||
772 | |||
773 | cpus_and(tmask, current->thread.user_cpus_allowed, | ||
774 | mt_fpu_cpumask); | ||
775 | set_cpus_allowed(current, tmask); | ||
776 | current->thread.mflags |= MF_FPUBOUND; | ||
777 | } | ||
778 | } | ||
779 | #endif /* CONFIG_MIPS_MT_FPAFF */ | ||
780 | } | ||
781 | |||
755 | asmlinkage void do_cpu(struct pt_regs *regs) | 782 | asmlinkage void do_cpu(struct pt_regs *regs) |
756 | { | 783 | { |
757 | unsigned int cpid; | 784 | unsigned int cpid; |
@@ -785,36 +812,8 @@ asmlinkage void do_cpu(struct pt_regs *regs) | |||
785 | ¤t->thread.fpu, 0); | 812 | ¤t->thread.fpu, 0); |
786 | if (sig) | 813 | if (sig) |
787 | force_sig(sig, current); | 814 | force_sig(sig, current); |
788 | #ifdef CONFIG_MIPS_MT_FPAFF | 815 | else |
789 | else { | 816 | mt_ase_fp_affinity(); |
790 | /* | ||
791 | * MIPS MT processors may have fewer FPU contexts | ||
792 | * than CPU threads. If we've emulated more than | ||
793 | * some threshold number of instructions, force | ||
794 | * migration to a "CPU" that has FP support. | ||
795 | */ | ||
796 | if(mt_fpemul_threshold > 0 | ||
797 | && ((current->thread.emulated_fp++ | ||
798 | > mt_fpemul_threshold))) { | ||
799 | /* | ||
800 | * If there's no FPU present, or if the | ||
801 | * application has already restricted | ||
802 | * the allowed set to exclude any CPUs | ||
803 | * with FPUs, we'll skip the procedure. | ||
804 | */ | ||
805 | if (cpus_intersects(current->cpus_allowed, | ||
806 | mt_fpu_cpumask)) { | ||
807 | cpumask_t tmask; | ||
808 | |||
809 | cpus_and(tmask, | ||
810 | current->thread.user_cpus_allowed, | ||
811 | mt_fpu_cpumask); | ||
812 | set_cpus_allowed(current, tmask); | ||
813 | current->thread.mflags |= MF_FPUBOUND; | ||
814 | } | ||
815 | } | ||
816 | } | ||
817 | #endif /* CONFIG_MIPS_MT_FPAFF */ | ||
818 | } | 817 | } |
819 | 818 | ||
820 | return; | 819 | return; |