diff options
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r-- | arch/mips/kernel/traps.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index a7a17eb9bfcd..b1233644fcca 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -1350,9 +1350,6 @@ void __init per_cpu_trap_init(void) | |||
1350 | if (!secondaryTC) { | 1350 | if (!secondaryTC) { |
1351 | #endif /* CONFIG_MIPS_MT_SMTC */ | 1351 | #endif /* CONFIG_MIPS_MT_SMTC */ |
1352 | 1352 | ||
1353 | /* | ||
1354 | * Interrupt handling. | ||
1355 | */ | ||
1356 | if (cpu_has_veic || cpu_has_vint) { | 1353 | if (cpu_has_veic || cpu_has_vint) { |
1357 | write_c0_ebase (ebase); | 1354 | write_c0_ebase (ebase); |
1358 | /* Setting vector spacing enables EI/VI mode */ | 1355 | /* Setting vector spacing enables EI/VI mode */ |
@@ -1366,6 +1363,23 @@ void __init per_cpu_trap_init(void) | |||
1366 | } else | 1363 | } else |
1367 | set_c0_cause(CAUSEF_IV); | 1364 | set_c0_cause(CAUSEF_IV); |
1368 | } | 1365 | } |
1366 | |||
1367 | /* | ||
1368 | * Before R2 both interrupt numbers were fixed to 7, so on R2 only: | ||
1369 | * | ||
1370 | * o read IntCtl.IPTI to determine the timer interrupt | ||
1371 | * o read IntCtl.IPPCI to determine the performance counter interrupt | ||
1372 | */ | ||
1373 | if (cpu_has_mips_r2) { | ||
1374 | cp0_compare_irq = (read_c0_intctl () >> 29) & 7; | ||
1375 | cp0_perfcount_irq = -1; | ||
1376 | } else { | ||
1377 | cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; | ||
1378 | cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7; | ||
1379 | if (cp0_perfcount_irq != cp0_compare_irq) | ||
1380 | cp0_perfcount_irq = -1; | ||
1381 | } | ||
1382 | |||
1369 | #ifdef CONFIG_MIPS_MT_SMTC | 1383 | #ifdef CONFIG_MIPS_MT_SMTC |
1370 | } | 1384 | } |
1371 | #endif /* CONFIG_MIPS_MT_SMTC */ | 1385 | #endif /* CONFIG_MIPS_MT_SMTC */ |