diff options
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r-- | arch/mips/kernel/traps.c | 143 |
1 files changed, 50 insertions, 93 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 0a18b4c62afb..31b204b26ba0 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -25,10 +25,12 @@ | |||
25 | #include <linux/ptrace.h> | 25 | #include <linux/ptrace.h> |
26 | #include <linux/kgdb.h> | 26 | #include <linux/kgdb.h> |
27 | #include <linux/kdebug.h> | 27 | #include <linux/kdebug.h> |
28 | #include <linux/notifier.h> | ||
28 | 29 | ||
29 | #include <asm/bootinfo.h> | 30 | #include <asm/bootinfo.h> |
30 | #include <asm/branch.h> | 31 | #include <asm/branch.h> |
31 | #include <asm/break.h> | 32 | #include <asm/break.h> |
33 | #include <asm/cop2.h> | ||
32 | #include <asm/cpu.h> | 34 | #include <asm/cpu.h> |
33 | #include <asm/dsp.h> | 35 | #include <asm/dsp.h> |
34 | #include <asm/fpu.h> | 36 | #include <asm/fpu.h> |
@@ -79,10 +81,6 @@ extern asmlinkage void handle_reserved(void); | |||
79 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, | 81 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, |
80 | struct mips_fpu_struct *ctx, int has_fpu); | 82 | struct mips_fpu_struct *ctx, int has_fpu); |
81 | 83 | ||
82 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | ||
83 | extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task); | ||
84 | #endif | ||
85 | |||
86 | void (*board_be_init)(void); | 84 | void (*board_be_init)(void); |
87 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); | 85 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); |
88 | void (*board_nmi_handler_setup)(void); | 86 | void (*board_nmi_handler_setup)(void); |
@@ -857,6 +855,44 @@ static void mt_ase_fp_affinity(void) | |||
857 | #endif /* CONFIG_MIPS_MT_FPAFF */ | 855 | #endif /* CONFIG_MIPS_MT_FPAFF */ |
858 | } | 856 | } |
859 | 857 | ||
858 | /* | ||
859 | * No lock; only written during early bootup by CPU 0. | ||
860 | */ | ||
861 | static RAW_NOTIFIER_HEAD(cu2_chain); | ||
862 | |||
863 | int __ref register_cu2_notifier(struct notifier_block *nb) | ||
864 | { | ||
865 | return raw_notifier_chain_register(&cu2_chain, nb); | ||
866 | } | ||
867 | |||
868 | int cu2_notifier_call_chain(unsigned long val, void *v) | ||
869 | { | ||
870 | return raw_notifier_call_chain(&cu2_chain, val, v); | ||
871 | } | ||
872 | |||
873 | static int default_cu2_call(struct notifier_block *nfb, unsigned long action, | ||
874 | void *data) | ||
875 | { | ||
876 | struct pt_regs *regs = data; | ||
877 | |||
878 | switch (action) { | ||
879 | default: | ||
880 | die_if_kernel("Unhandled kernel unaligned access or invalid " | ||
881 | "instruction", regs); | ||
882 | /* Fall through */ | ||
883 | |||
884 | case CU2_EXCEPTION: | ||
885 | force_sig(SIGILL, current); | ||
886 | } | ||
887 | |||
888 | return NOTIFY_OK; | ||
889 | } | ||
890 | |||
891 | static struct notifier_block default_cu2_notifier = { | ||
892 | .notifier_call = default_cu2_call, | ||
893 | .priority = 0x80000000, /* Run last */ | ||
894 | }; | ||
895 | |||
860 | asmlinkage void do_cpu(struct pt_regs *regs) | 896 | asmlinkage void do_cpu(struct pt_regs *regs) |
861 | { | 897 | { |
862 | unsigned int __user *epc; | 898 | unsigned int __user *epc; |
@@ -920,17 +956,9 @@ asmlinkage void do_cpu(struct pt_regs *regs) | |||
920 | return; | 956 | return; |
921 | 957 | ||
922 | case 2: | 958 | case 2: |
923 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | 959 | raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs); |
924 | prefetch(¤t->thread.cp2); | 960 | break; |
925 | local_irq_save(flags); | 961 | |
926 | KSTK_STATUS(current) |= ST0_CU2; | ||
927 | status = read_c0_status(); | ||
928 | write_c0_status(status | ST0_CU2); | ||
929 | octeon_cop2_restore(&(current->thread.cp2)); | ||
930 | write_c0_status(status & ~ST0_CU2); | ||
931 | local_irq_restore(flags); | ||
932 | return; | ||
933 | #endif | ||
934 | case 3: | 962 | case 3: |
935 | break; | 963 | break; |
936 | } | 964 | } |
@@ -1367,77 +1395,6 @@ void *set_vi_handler(int n, vi_handler_t addr) | |||
1367 | return set_vi_srs_handler(n, addr, 0); | 1395 | return set_vi_srs_handler(n, addr, 0); |
1368 | } | 1396 | } |
1369 | 1397 | ||
1370 | /* | ||
1371 | * This is used by native signal handling | ||
1372 | */ | ||
1373 | asmlinkage int (*save_fp_context)(struct sigcontext __user *sc); | ||
1374 | asmlinkage int (*restore_fp_context)(struct sigcontext __user *sc); | ||
1375 | |||
1376 | extern asmlinkage int _save_fp_context(struct sigcontext __user *sc); | ||
1377 | extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc); | ||
1378 | |||
1379 | extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc); | ||
1380 | extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc); | ||
1381 | |||
1382 | #ifdef CONFIG_SMP | ||
1383 | static int smp_save_fp_context(struct sigcontext __user *sc) | ||
1384 | { | ||
1385 | return raw_cpu_has_fpu | ||
1386 | ? _save_fp_context(sc) | ||
1387 | : fpu_emulator_save_context(sc); | ||
1388 | } | ||
1389 | |||
1390 | static int smp_restore_fp_context(struct sigcontext __user *sc) | ||
1391 | { | ||
1392 | return raw_cpu_has_fpu | ||
1393 | ? _restore_fp_context(sc) | ||
1394 | : fpu_emulator_restore_context(sc); | ||
1395 | } | ||
1396 | #endif | ||
1397 | |||
1398 | static inline void signal_init(void) | ||
1399 | { | ||
1400 | #ifdef CONFIG_SMP | ||
1401 | /* For now just do the cpu_has_fpu check when the functions are invoked */ | ||
1402 | save_fp_context = smp_save_fp_context; | ||
1403 | restore_fp_context = smp_restore_fp_context; | ||
1404 | #else | ||
1405 | if (cpu_has_fpu) { | ||
1406 | save_fp_context = _save_fp_context; | ||
1407 | restore_fp_context = _restore_fp_context; | ||
1408 | } else { | ||
1409 | save_fp_context = fpu_emulator_save_context; | ||
1410 | restore_fp_context = fpu_emulator_restore_context; | ||
1411 | } | ||
1412 | #endif | ||
1413 | } | ||
1414 | |||
1415 | #ifdef CONFIG_MIPS32_COMPAT | ||
1416 | |||
1417 | /* | ||
1418 | * This is used by 32-bit signal stuff on the 64-bit kernel | ||
1419 | */ | ||
1420 | asmlinkage int (*save_fp_context32)(struct sigcontext32 __user *sc); | ||
1421 | asmlinkage int (*restore_fp_context32)(struct sigcontext32 __user *sc); | ||
1422 | |||
1423 | extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc); | ||
1424 | extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc); | ||
1425 | |||
1426 | extern asmlinkage int fpu_emulator_save_context32(struct sigcontext32 __user *sc); | ||
1427 | extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 __user *sc); | ||
1428 | |||
1429 | static inline void signal32_init(void) | ||
1430 | { | ||
1431 | if (cpu_has_fpu) { | ||
1432 | save_fp_context32 = _save_fp_context32; | ||
1433 | restore_fp_context32 = _restore_fp_context32; | ||
1434 | } else { | ||
1435 | save_fp_context32 = fpu_emulator_save_context32; | ||
1436 | restore_fp_context32 = fpu_emulator_restore_context32; | ||
1437 | } | ||
1438 | } | ||
1439 | #endif | ||
1440 | |||
1441 | extern void cpu_cache_init(void); | 1398 | extern void cpu_cache_init(void); |
1442 | extern void tlb_init(void); | 1399 | extern void tlb_init(void); |
1443 | extern void flush_tlb_handlers(void); | 1400 | extern void flush_tlb_handlers(void); |
@@ -1446,6 +1403,7 @@ extern void flush_tlb_handlers(void); | |||
1446 | * Timer interrupt | 1403 | * Timer interrupt |
1447 | */ | 1404 | */ |
1448 | int cp0_compare_irq; | 1405 | int cp0_compare_irq; |
1406 | int cp0_compare_irq_shift; | ||
1449 | 1407 | ||
1450 | /* | 1408 | /* |
1451 | * Performance counter IRQ or -1 if shared with timer | 1409 | * Performance counter IRQ or -1 if shared with timer |
@@ -1536,12 +1494,14 @@ void __cpuinit per_cpu_trap_init(void) | |||
1536 | * o read IntCtl.IPPCI to determine the performance counter interrupt | 1494 | * o read IntCtl.IPPCI to determine the performance counter interrupt |
1537 | */ | 1495 | */ |
1538 | if (cpu_has_mips_r2) { | 1496 | if (cpu_has_mips_r2) { |
1539 | cp0_compare_irq = (read_c0_intctl() >> 29) & 7; | 1497 | cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; |
1540 | cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7; | 1498 | cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7; |
1499 | cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7; | ||
1541 | if (cp0_perfcount_irq == cp0_compare_irq) | 1500 | if (cp0_perfcount_irq == cp0_compare_irq) |
1542 | cp0_perfcount_irq = -1; | 1501 | cp0_perfcount_irq = -1; |
1543 | } else { | 1502 | } else { |
1544 | cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; | 1503 | cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; |
1504 | cp0_compare_irq_shift = cp0_compare_irq; | ||
1545 | cp0_perfcount_irq = -1; | 1505 | cp0_perfcount_irq = -1; |
1546 | } | 1506 | } |
1547 | 1507 | ||
@@ -1751,13 +1711,10 @@ void __init trap_init(void) | |||
1751 | else | 1711 | else |
1752 | memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80); | 1712 | memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80); |
1753 | 1713 | ||
1754 | signal_init(); | ||
1755 | #ifdef CONFIG_MIPS32_COMPAT | ||
1756 | signal32_init(); | ||
1757 | #endif | ||
1758 | |||
1759 | local_flush_icache_range(ebase, ebase + 0x400); | 1714 | local_flush_icache_range(ebase, ebase + 0x400); |
1760 | flush_tlb_handlers(); | 1715 | flush_tlb_handlers(); |
1761 | 1716 | ||
1762 | sort_extable(__start___dbe_table, __stop___dbe_table); | 1717 | sort_extable(__start___dbe_table, __stop___dbe_table); |
1718 | |||
1719 | register_cu2_notifier(&default_cu2_notifier); | ||
1763 | } | 1720 | } |