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Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r--arch/mips/kernel/traps.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 0903d70b2cfe..aec3408edd4b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -90,7 +90,7 @@ void (*board_nmi_handler_setup)(void);
90void (*board_ejtag_handler_setup)(void); 90void (*board_ejtag_handler_setup)(void);
91void (*board_bind_eic_interrupt)(int irq, int regset); 91void (*board_bind_eic_interrupt)(int irq, int regset);
92void (*board_ebase_setup)(void); 92void (*board_ebase_setup)(void);
93void __cpuinitdata(*board_cache_error_setup)(void); 93void(*board_cache_error_setup)(void);
94 94
95static void show_raw_backtrace(unsigned long reg29) 95static void show_raw_backtrace(unsigned long reg29)
96{ 96{
@@ -1242,7 +1242,6 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
1242 panic("Caught Machine Check exception - %scaused by multiple " 1242 panic("Caught Machine Check exception - %scaused by multiple "
1243 "matching entries in the TLB.", 1243 "matching entries in the TLB.",
1244 (multi_match) ? "" : "not "); 1244 (multi_match) ? "" : "not ");
1245 exception_exit(prev_state);
1246} 1245}
1247 1246
1248asmlinkage void do_mt(struct pt_regs *regs) 1247asmlinkage void do_mt(struct pt_regs *regs)
@@ -1682,7 +1681,7 @@ int cp0_compare_irq_shift;
1682int cp0_perfcount_irq; 1681int cp0_perfcount_irq;
1683EXPORT_SYMBOL_GPL(cp0_perfcount_irq); 1682EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
1684 1683
1685static int __cpuinitdata noulri; 1684static int noulri;
1686 1685
1687static int __init ulri_disable(char *s) 1686static int __init ulri_disable(char *s)
1688{ 1687{
@@ -1693,7 +1692,7 @@ static int __init ulri_disable(char *s)
1693} 1692}
1694__setup("noulri", ulri_disable); 1693__setup("noulri", ulri_disable);
1695 1694
1696void __cpuinit per_cpu_trap_init(bool is_boot_cpu) 1695void per_cpu_trap_init(bool is_boot_cpu)
1697{ 1696{
1698 unsigned int cpu = smp_processor_id(); 1697 unsigned int cpu = smp_processor_id();
1699 unsigned int status_set = ST0_CU0; 1698 unsigned int status_set = ST0_CU0;
@@ -1810,7 +1809,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
1810} 1809}
1811 1810
1812/* Install CPU exception handler */ 1811/* Install CPU exception handler */
1813void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size) 1812void set_handler(unsigned long offset, void *addr, unsigned long size)
1814{ 1813{
1815#ifdef CONFIG_CPU_MICROMIPS 1814#ifdef CONFIG_CPU_MICROMIPS
1816 memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size); 1815 memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size);
@@ -1820,7 +1819,7 @@ void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)
1820 local_flush_icache_range(ebase + offset, ebase + offset + size); 1819 local_flush_icache_range(ebase + offset, ebase + offset + size);
1821} 1820}
1822 1821
1823static char panic_null_cerr[] __cpuinitdata = 1822static char panic_null_cerr[] =
1824 "Trying to set NULL cache error exception handler"; 1823 "Trying to set NULL cache error exception handler";
1825 1824
1826/* 1825/*
@@ -1828,7 +1827,7 @@ static char panic_null_cerr[] __cpuinitdata =
1828 * This is suitable only for the cache error exception which is the only 1827 * This is suitable only for the cache error exception which is the only
1829 * exception handler that is being run uncached. 1828 * exception handler that is being run uncached.
1830 */ 1829 */
1831void __cpuinit set_uncached_handler(unsigned long offset, void *addr, 1830void set_uncached_handler(unsigned long offset, void *addr,
1832 unsigned long size) 1831 unsigned long size)
1833{ 1832{
1834 unsigned long uncached_ebase = CKSEG1ADDR(ebase); 1833 unsigned long uncached_ebase = CKSEG1ADDR(ebase);