diff options
Diffstat (limited to 'arch/mips/kernel/time.c')
-rw-r--r-- | arch/mips/kernel/time.c | 42 |
1 files changed, 16 insertions, 26 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 111d1baa3b22..11aab6d6bfe5 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * Free Software Foundation; either version 2 of the License, or (at your | 11 | * Free Software Foundation; either version 2 of the License, or (at your |
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | #include <linux/clocksource.h> | ||
15 | #include <linux/types.h> | 14 | #include <linux/types.h> |
16 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 16 | #include <linux/init.h> |
@@ -83,7 +82,7 @@ static void null_timer_ack(void) { /* nothing */ } | |||
83 | /* | 82 | /* |
84 | * Null high precision timer functions for systems lacking one. | 83 | * Null high precision timer functions for systems lacking one. |
85 | */ | 84 | */ |
86 | static unsigned int null_hpt_read(void) | 85 | static cycle_t null_hpt_read(void) |
87 | { | 86 | { |
88 | return 0; | 87 | return 0; |
89 | } | 88 | } |
@@ -112,7 +111,7 @@ static void c0_timer_ack(void) | |||
112 | /* | 111 | /* |
113 | * High precision timer functions for a R4k-compatible timer. | 112 | * High precision timer functions for a R4k-compatible timer. |
114 | */ | 113 | */ |
115 | static unsigned int c0_hpt_read(void) | 114 | static cycle_t c0_hpt_read(void) |
116 | { | 115 | { |
117 | return read_c0_count(); | 116 | return read_c0_count(); |
118 | } | 117 | } |
@@ -126,8 +125,6 @@ static void __init c0_hpt_timer_init(void) | |||
126 | 125 | ||
127 | int (*mips_timer_state)(void); | 126 | int (*mips_timer_state)(void); |
128 | void (*mips_timer_ack)(void); | 127 | void (*mips_timer_ack)(void); |
129 | unsigned int (*mips_hpt_read)(void); | ||
130 | unsigned int mips_hpt_mask = 0xffffffff; | ||
131 | 128 | ||
132 | /* last time when xtime and rtc are sync'ed up */ | 129 | /* last time when xtime and rtc are sync'ed up */ |
133 | static long last_rtc_update; | 130 | static long last_rtc_update; |
@@ -269,8 +266,7 @@ static struct irqaction timer_irqaction = { | |||
269 | 266 | ||
270 | static unsigned int __init calibrate_hpt(void) | 267 | static unsigned int __init calibrate_hpt(void) |
271 | { | 268 | { |
272 | u64 frequency; | 269 | cycle_t frequency, hpt_start, hpt_end, hpt_count, hz; |
273 | u32 hpt_start, hpt_end, hpt_count, hz; | ||
274 | 270 | ||
275 | const int loops = HZ / 10; | 271 | const int loops = HZ / 10; |
276 | int log_2_loops = 0; | 272 | int log_2_loops = 0; |
@@ -296,28 +292,23 @@ static unsigned int __init calibrate_hpt(void) | |||
296 | * during the calculated number of periods between timer | 292 | * during the calculated number of periods between timer |
297 | * interrupts. | 293 | * interrupts. |
298 | */ | 294 | */ |
299 | hpt_start = mips_hpt_read(); | 295 | hpt_start = clocksource_mips.read(); |
300 | do { | 296 | do { |
301 | while (mips_timer_state()); | 297 | while (mips_timer_state()); |
302 | while (!mips_timer_state()); | 298 | while (!mips_timer_state()); |
303 | } while (--i); | 299 | } while (--i); |
304 | hpt_end = mips_hpt_read(); | 300 | hpt_end = clocksource_mips.read(); |
305 | 301 | ||
306 | hpt_count = (hpt_end - hpt_start) & mips_hpt_mask; | 302 | hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask; |
307 | hz = HZ; | 303 | hz = HZ; |
308 | frequency = (u64)hpt_count * (u64)hz; | 304 | frequency = hpt_count * hz; |
309 | 305 | ||
310 | return frequency >> log_2_loops; | 306 | return frequency >> log_2_loops; |
311 | } | 307 | } |
312 | 308 | ||
313 | static cycle_t read_mips_hpt(void) | 309 | struct clocksource clocksource_mips = { |
314 | { | ||
315 | return (cycle_t)mips_hpt_read(); | ||
316 | } | ||
317 | |||
318 | static struct clocksource clocksource_mips = { | ||
319 | .name = "MIPS", | 310 | .name = "MIPS", |
320 | .read = read_mips_hpt, | 311 | .mask = 0xffffffff, |
321 | .is_continuous = 1, | 312 | .is_continuous = 1, |
322 | }; | 313 | }; |
323 | 314 | ||
@@ -326,7 +317,7 @@ static void __init init_mips_clocksource(void) | |||
326 | u64 temp; | 317 | u64 temp; |
327 | u32 shift; | 318 | u32 shift; |
328 | 319 | ||
329 | if (!mips_hpt_frequency || mips_hpt_read == null_hpt_read) | 320 | if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read) |
330 | return; | 321 | return; |
331 | 322 | ||
332 | /* Calclate a somewhat reasonable rating value */ | 323 | /* Calclate a somewhat reasonable rating value */ |
@@ -340,7 +331,6 @@ static void __init init_mips_clocksource(void) | |||
340 | } | 331 | } |
341 | clocksource_mips.shift = shift; | 332 | clocksource_mips.shift = shift; |
342 | clocksource_mips.mult = (u32)temp; | 333 | clocksource_mips.mult = (u32)temp; |
343 | clocksource_mips.mask = mips_hpt_mask; | ||
344 | 334 | ||
345 | clocksource_register(&clocksource_mips); | 335 | clocksource_register(&clocksource_mips); |
346 | } | 336 | } |
@@ -360,19 +350,19 @@ void __init time_init(void) | |||
360 | -xtime.tv_sec, -xtime.tv_nsec); | 350 | -xtime.tv_sec, -xtime.tv_nsec); |
361 | 351 | ||
362 | /* Choose appropriate high precision timer routines. */ | 352 | /* Choose appropriate high precision timer routines. */ |
363 | if (!cpu_has_counter && !mips_hpt_read) | 353 | if (!cpu_has_counter && !clocksource_mips.read) |
364 | /* No high precision timer -- sorry. */ | 354 | /* No high precision timer -- sorry. */ |
365 | mips_hpt_read = null_hpt_read; | 355 | clocksource_mips.read = null_hpt_read; |
366 | else if (!mips_hpt_frequency && !mips_timer_state) { | 356 | else if (!mips_hpt_frequency && !mips_timer_state) { |
367 | /* A high precision timer of unknown frequency. */ | 357 | /* A high precision timer of unknown frequency. */ |
368 | if (!mips_hpt_read) | 358 | if (!clocksource_mips.read) |
369 | /* No external high precision timer -- use R4k. */ | 359 | /* No external high precision timer -- use R4k. */ |
370 | mips_hpt_read = c0_hpt_read; | 360 | clocksource_mips.read = c0_hpt_read; |
371 | } else { | 361 | } else { |
372 | /* We know counter frequency. Or we can get it. */ | 362 | /* We know counter frequency. Or we can get it. */ |
373 | if (!mips_hpt_read) { | 363 | if (!clocksource_mips.read) { |
374 | /* No external high precision timer -- use R4k. */ | 364 | /* No external high precision timer -- use R4k. */ |
375 | mips_hpt_read = c0_hpt_read; | 365 | clocksource_mips.read = c0_hpt_read; |
376 | 366 | ||
377 | if (!mips_timer_state) { | 367 | if (!mips_timer_state) { |
378 | /* No external timer interrupt -- use R4k. */ | 368 | /* No external timer interrupt -- use R4k. */ |