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-rw-r--r--arch/mips/kernel/time.c349
1 files changed, 60 insertions, 289 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index debe86c2f691..11aab6d6bfe5 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -67,15 +67,9 @@ int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time;
67int (*rtc_mips_set_mmss)(unsigned long); 67int (*rtc_mips_set_mmss)(unsigned long);
68 68
69 69
70/* usecs per counter cycle, shifted to left by 32 bits */
71static unsigned int sll32_usecs_per_cycle;
72
73/* how many counter cycles in a jiffy */ 70/* how many counter cycles in a jiffy */
74static unsigned long cycles_per_jiffy __read_mostly; 71static unsigned long cycles_per_jiffy __read_mostly;
75 72
76/* Cycle counter value at the previous timer interrupt.. */
77static unsigned int timerhi, timerlo;
78
79/* expirelo is the count value for next CPU timer interrupt */ 73/* expirelo is the count value for next CPU timer interrupt */
80static unsigned int expirelo; 74static unsigned int expirelo;
81 75
@@ -88,17 +82,11 @@ static void null_timer_ack(void) { /* nothing */ }
88/* 82/*
89 * Null high precision timer functions for systems lacking one. 83 * Null high precision timer functions for systems lacking one.
90 */ 84 */
91static unsigned int null_hpt_read(void) 85static cycle_t null_hpt_read(void)
92{ 86{
93 return 0; 87 return 0;
94} 88}
95 89
96static void null_hpt_init(unsigned int count)
97{
98 /* nothing */
99}
100
101
102/* 90/*
103 * Timer ack for an R4k-compatible timer of a known frequency. 91 * Timer ack for an R4k-compatible timer of a known frequency.
104 */ 92 */
@@ -123,191 +111,20 @@ static void c0_timer_ack(void)
123/* 111/*
124 * High precision timer functions for a R4k-compatible timer. 112 * High precision timer functions for a R4k-compatible timer.
125 */ 113 */
126static unsigned int c0_hpt_read(void) 114static cycle_t c0_hpt_read(void)
127{ 115{
128 return read_c0_count(); 116 return read_c0_count();
129} 117}
130 118
131/* For use solely as a high precision timer. */
132static void c0_hpt_init(unsigned int count)
133{
134 write_c0_count(read_c0_count() - count);
135}
136
137/* For use both as a high precision timer and an interrupt source. */ 119/* For use both as a high precision timer and an interrupt source. */
138static void c0_hpt_timer_init(unsigned int count) 120static void __init c0_hpt_timer_init(void)
139{ 121{
140 count = read_c0_count() - count; 122 expirelo = read_c0_count() + cycles_per_jiffy;
141 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
142 write_c0_count(expirelo - cycles_per_jiffy);
143 write_c0_compare(expirelo); 123 write_c0_compare(expirelo);
144 write_c0_count(count);
145} 124}
146 125
147int (*mips_timer_state)(void); 126int (*mips_timer_state)(void);
148void (*mips_timer_ack)(void); 127void (*mips_timer_ack)(void);
149unsigned int (*mips_hpt_read)(void);
150void (*mips_hpt_init)(unsigned int);
151
152/*
153 * Gettimeoffset routines. These routines returns the time duration
154 * since last timer interrupt in usecs.
155 *
156 * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
157 * Otherwise use calibrate_gettimeoffset()
158 *
159 * If the CPU does not have the counter register, you can either supply
160 * your own gettimeoffset() routine, or use null_gettimeoffset(), which
161 * gives the same resolution as HZ.
162 */
163
164static unsigned long null_gettimeoffset(void)
165{
166 return 0;
167}
168
169
170/* The function pointer to one of the gettimeoffset funcs. */
171unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
172
173
174static unsigned long fixed_rate_gettimeoffset(void)
175{
176 u32 count;
177 unsigned long res;
178
179 /* Get last timer tick in absolute kernel time */
180 count = mips_hpt_read();
181
182 /* .. relative to previous jiffy (32 bits is enough) */
183 count -= timerlo;
184
185 __asm__("multu %1,%2"
186 : "=h" (res)
187 : "r" (count), "r" (sll32_usecs_per_cycle)
188 : "lo", GCC_REG_ACCUM);
189
190 /*
191 * Due to possible jiffies inconsistencies, we need to check
192 * the result so that we'll get a timer that is monotonic.
193 */
194 if (res >= USECS_PER_JIFFY)
195 res = USECS_PER_JIFFY - 1;
196
197 return res;
198}
199
200
201/*
202 * Cached "1/(clocks per usec) * 2^32" value.
203 * It has to be recalculated once each jiffy.
204 */
205static unsigned long cached_quotient;
206
207/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
208static unsigned long last_jiffies;
209
210/*
211 * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
212 */
213static unsigned long calibrate_div32_gettimeoffset(void)
214{
215 u32 count;
216 unsigned long res, tmp;
217 unsigned long quotient;
218
219 tmp = jiffies;
220
221 quotient = cached_quotient;
222
223 if (last_jiffies != tmp) {
224 last_jiffies = tmp;
225 if (last_jiffies != 0) {
226 unsigned long r0;
227 do_div64_32(r0, timerhi, timerlo, tmp);
228 do_div64_32(quotient, USECS_PER_JIFFY,
229 USECS_PER_JIFFY_FRAC, r0);
230 cached_quotient = quotient;
231 }
232 }
233
234 /* Get last timer tick in absolute kernel time */
235 count = mips_hpt_read();
236
237 /* .. relative to previous jiffy (32 bits is enough) */
238 count -= timerlo;
239
240 __asm__("multu %1,%2"
241 : "=h" (res)
242 : "r" (count), "r" (quotient)
243 : "lo", GCC_REG_ACCUM);
244
245 /*
246 * Due to possible jiffies inconsistencies, we need to check
247 * the result so that we'll get a timer that is monotonic.
248 */
249 if (res >= USECS_PER_JIFFY)
250 res = USECS_PER_JIFFY - 1;
251
252 return res;
253}
254
255static unsigned long calibrate_div64_gettimeoffset(void)
256{
257 u32 count;
258 unsigned long res, tmp;
259 unsigned long quotient;
260
261 tmp = jiffies;
262
263 quotient = cached_quotient;
264
265 if (last_jiffies != tmp) {
266 last_jiffies = tmp;
267 if (last_jiffies) {
268 unsigned long r0;
269 __asm__(".set push\n\t"
270 ".set mips3\n\t"
271 "lwu %0,%3\n\t"
272 "dsll32 %1,%2,0\n\t"
273 "or %1,%1,%0\n\t"
274 "ddivu $0,%1,%4\n\t"
275 "mflo %1\n\t"
276 "dsll32 %0,%5,0\n\t"
277 "or %0,%0,%6\n\t"
278 "ddivu $0,%0,%1\n\t"
279 "mflo %0\n\t"
280 ".set pop"
281 : "=&r" (quotient), "=&r" (r0)
282 : "r" (timerhi), "m" (timerlo),
283 "r" (tmp), "r" (USECS_PER_JIFFY),
284 "r" (USECS_PER_JIFFY_FRAC)
285 : "hi", "lo", GCC_REG_ACCUM);
286 cached_quotient = quotient;
287 }
288 }
289
290 /* Get last timer tick in absolute kernel time */
291 count = mips_hpt_read();
292
293 /* .. relative to previous jiffy (32 bits is enough) */
294 count -= timerlo;
295
296 __asm__("multu %1,%2"
297 : "=h" (res)
298 : "r" (count), "r" (quotient)
299 : "lo", GCC_REG_ACCUM);
300
301 /*
302 * Due to possible jiffies inconsistencies, we need to check
303 * the result so that we'll get a timer that is monotonic.
304 */
305 if (res >= USECS_PER_JIFFY)
306 res = USECS_PER_JIFFY - 1;
307
308 return res;
309}
310
311 128
312/* last time when xtime and rtc are sync'ed up */ 129/* last time when xtime and rtc are sync'ed up */
313static long last_rtc_update; 130static long last_rtc_update;
@@ -334,18 +151,10 @@ void local_timer_interrupt(int irq, void *dev_id)
334 */ 151 */
335irqreturn_t timer_interrupt(int irq, void *dev_id) 152irqreturn_t timer_interrupt(int irq, void *dev_id)
336{ 153{
337 unsigned long j;
338 unsigned int count;
339
340 write_seqlock(&xtime_lock); 154 write_seqlock(&xtime_lock);
341 155
342 count = mips_hpt_read();
343 mips_timer_ack(); 156 mips_timer_ack();
344 157
345 /* Update timerhi/timerlo for intra-jiffy calibration. */
346 timerhi += count < timerlo; /* Wrap around */
347 timerlo = count;
348
349 /* 158 /*
350 * call the generic timer interrupt handling 159 * call the generic timer interrupt handling
351 */ 160 */
@@ -368,47 +177,6 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
368 } 177 }
369 } 178 }
370 179
371 /*
372 * If jiffies has overflown in this timer_interrupt, we must
373 * update the timer[hi]/[lo] to make fast gettimeoffset funcs
374 * quotient calc still valid. -arca
375 *
376 * The first timer interrupt comes late as interrupts are
377 * enabled long after timers are initialized. Therefore the
378 * high precision timer is fast, leading to wrong gettimeoffset()
379 * calculations. We deal with it by setting it based on the
380 * number of its ticks between the second and the third interrupt.
381 * That is still somewhat imprecise, but it's a good estimate.
382 * --macro
383 */
384 j = jiffies;
385 if (j < 4) {
386 static unsigned int prev_count;
387 static int hpt_initialized;
388
389 switch (j) {
390 case 0:
391 timerhi = timerlo = 0;
392 mips_hpt_init(count);
393 break;
394 case 2:
395 prev_count = count;
396 break;
397 case 3:
398 if (!hpt_initialized) {
399 unsigned int c3 = 3 * (count - prev_count);
400
401 timerhi = 0;
402 timerlo = c3;
403 mips_hpt_init(count - c3);
404 hpt_initialized = 1;
405 }
406 break;
407 default:
408 break;
409 }
410 }
411
412 write_sequnlock(&xtime_lock); 180 write_sequnlock(&xtime_lock);
413 181
414 /* 182 /*
@@ -476,12 +244,11 @@ asmlinkage void ll_local_timer_interrupt(int irq)
476 * 1) board_time_init() - 244 * 1) board_time_init() -
477 * a) (optional) set up RTC routines, 245 * a) (optional) set up RTC routines,
478 * b) (optional) calibrate and set the mips_hpt_frequency 246 * b) (optional) calibrate and set the mips_hpt_frequency
479 * (only needed if you intended to use fixed_rate_gettimeoffset 247 * (only needed if you intended to use cpu counter as timer interrupt
480 * or use cpu counter as timer interrupt source) 248 * source)
481 * 2) setup xtime based on rtc_mips_get_time(). 249 * 2) setup xtime based on rtc_mips_get_time().
482 * 3) choose a appropriate gettimeoffset routine. 250 * 3) calculate a couple of cached variables for later usage
483 * 4) calculate a couple of cached variables for later usage 251 * 4) plat_timer_setup() -
484 * 5) plat_timer_setup() -
485 * a) (optional) over-write any choices made above by time_init(). 252 * a) (optional) over-write any choices made above by time_init().
486 * b) machine specific code should setup the timer irqaction. 253 * b) machine specific code should setup the timer irqaction.
487 * c) enable the timer interrupt 254 * c) enable the timer interrupt
@@ -499,8 +266,7 @@ static struct irqaction timer_irqaction = {
499 266
500static unsigned int __init calibrate_hpt(void) 267static unsigned int __init calibrate_hpt(void)
501{ 268{
502 u64 frequency; 269 cycle_t frequency, hpt_start, hpt_end, hpt_count, hz;
503 u32 hpt_start, hpt_end, hpt_count, hz;
504 270
505 const int loops = HZ / 10; 271 const int loops = HZ / 10;
506 int log_2_loops = 0; 272 int log_2_loops = 0;
@@ -526,20 +292,49 @@ static unsigned int __init calibrate_hpt(void)
526 * during the calculated number of periods between timer 292 * during the calculated number of periods between timer
527 * interrupts. 293 * interrupts.
528 */ 294 */
529 hpt_start = mips_hpt_read(); 295 hpt_start = clocksource_mips.read();
530 do { 296 do {
531 while (mips_timer_state()); 297 while (mips_timer_state());
532 while (!mips_timer_state()); 298 while (!mips_timer_state());
533 } while (--i); 299 } while (--i);
534 hpt_end = mips_hpt_read(); 300 hpt_end = clocksource_mips.read();
535 301
536 hpt_count = hpt_end - hpt_start; 302 hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask;
537 hz = HZ; 303 hz = HZ;
538 frequency = (u64)hpt_count * (u64)hz; 304 frequency = hpt_count * hz;
539 305
540 return frequency >> log_2_loops; 306 return frequency >> log_2_loops;
541} 307}
542 308
309struct clocksource clocksource_mips = {
310 .name = "MIPS",
311 .mask = 0xffffffff,
312 .is_continuous = 1,
313};
314
315static void __init init_mips_clocksource(void)
316{
317 u64 temp;
318 u32 shift;
319
320 if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
321 return;
322
323 /* Calclate a somewhat reasonable rating value */
324 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
325 /* Find a shift value */
326 for (shift = 32; shift > 0; shift--) {
327 temp = (u64) NSEC_PER_SEC << shift;
328 do_div(temp, mips_hpt_frequency);
329 if ((temp >> 32) == 0)
330 break;
331 }
332 clocksource_mips.shift = shift;
333 clocksource_mips.mult = (u32)temp;
334
335 clocksource_register(&clocksource_mips);
336}
337
543void __init time_init(void) 338void __init time_init(void)
544{ 339{
545 if (board_time_init) 340 if (board_time_init)
@@ -555,59 +350,36 @@ void __init time_init(void)
555 -xtime.tv_sec, -xtime.tv_nsec); 350 -xtime.tv_sec, -xtime.tv_nsec);
556 351
557 /* Choose appropriate high precision timer routines. */ 352 /* Choose appropriate high precision timer routines. */
558 if (!cpu_has_counter && !mips_hpt_read) { 353 if (!cpu_has_counter && !clocksource_mips.read)
559 /* No high precision timer -- sorry. */ 354 /* No high precision timer -- sorry. */
560 mips_hpt_read = null_hpt_read; 355 clocksource_mips.read = null_hpt_read;
561 mips_hpt_init = null_hpt_init; 356 else if (!mips_hpt_frequency && !mips_timer_state) {
562 } else if (!mips_hpt_frequency && !mips_timer_state) {
563 /* A high precision timer of unknown frequency. */ 357 /* A high precision timer of unknown frequency. */
564 if (!mips_hpt_read) { 358 if (!clocksource_mips.read)
565 /* No external high precision timer -- use R4k. */ 359 /* No external high precision timer -- use R4k. */
566 mips_hpt_read = c0_hpt_read; 360 clocksource_mips.read = c0_hpt_read;
567 mips_hpt_init = c0_hpt_init;
568 }
569
570 if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
571 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
572 (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
573 /*
574 * We need to calibrate the counter but we don't have
575 * 64-bit division.
576 */
577 do_gettimeoffset = calibrate_div32_gettimeoffset;
578 else
579 /*
580 * We need to calibrate the counter but we *do* have
581 * 64-bit division.
582 */
583 do_gettimeoffset = calibrate_div64_gettimeoffset;
584 } else { 361 } else {
585 /* We know counter frequency. Or we can get it. */ 362 /* We know counter frequency. Or we can get it. */
586 if (!mips_hpt_read) { 363 if (!clocksource_mips.read) {
587 /* No external high precision timer -- use R4k. */ 364 /* No external high precision timer -- use R4k. */
588 mips_hpt_read = c0_hpt_read; 365 clocksource_mips.read = c0_hpt_read;
589 366
590 if (mips_timer_state) 367 if (!mips_timer_state) {
591 mips_hpt_init = c0_hpt_init;
592 else {
593 /* No external timer interrupt -- use R4k. */ 368 /* No external timer interrupt -- use R4k. */
594 mips_hpt_init = c0_hpt_timer_init;
595 mips_timer_ack = c0_timer_ack; 369 mips_timer_ack = c0_timer_ack;
370 /* Calculate cache parameters. */
371 cycles_per_jiffy =
372 (mips_hpt_frequency + HZ / 2) / HZ;
373 /*
374 * This sets up the high precision
375 * timer for the first interrupt.
376 */
377 c0_hpt_timer_init();
596 } 378 }
597 } 379 }
598 if (!mips_hpt_frequency) 380 if (!mips_hpt_frequency)
599 mips_hpt_frequency = calibrate_hpt(); 381 mips_hpt_frequency = calibrate_hpt();
600 382
601 do_gettimeoffset = fixed_rate_gettimeoffset;
602
603 /* Calculate cache parameters. */
604 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
605
606 /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
607 do_div64_32(sll32_usecs_per_cycle,
608 1000000, mips_hpt_frequency / 2,
609 mips_hpt_frequency);
610
611 /* Report the high precision timer rate for a reference. */ 383 /* Report the high precision timer rate for a reference. */
612 printk("Using %u.%03u MHz high precision timer.\n", 384 printk("Using %u.%03u MHz high precision timer.\n",
613 ((mips_hpt_frequency + 500) / 1000) / 1000, 385 ((mips_hpt_frequency + 500) / 1000) / 1000,
@@ -618,9 +390,6 @@ void __init time_init(void)
618 /* No timer interrupt ack (e.g. i8254). */ 390 /* No timer interrupt ack (e.g. i8254). */
619 mips_timer_ack = null_timer_ack; 391 mips_timer_ack = null_timer_ack;
620 392
621 /* This sets up the high precision timer for the first interrupt. */
622 mips_hpt_init(mips_hpt_read());
623
624 /* 393 /*
625 * Call board specific timer interrupt setup. 394 * Call board specific timer interrupt setup.
626 * 395 *
@@ -633,6 +402,8 @@ void __init time_init(void)
633 * is not invoked accidentally. 402 * is not invoked accidentally.
634 */ 403 */
635 plat_timer_setup(&timer_irqaction); 404 plat_timer_setup(&timer_irqaction);
405
406 init_mips_clocksource();
636} 407}
637 408
638#define FEBRUARY 2 409#define FEBRUARY 2