1 files changed, 7 insertions, 8 deletions

diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 31d22f3121c9..75a4fd709841 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -34,6 +34,7 @@
 #include <asm/hardirq.h>
 #include <asm/hazards.h>
 #include <asm/irq.h>
+#include <asm/idle.h>
 #include <asm/mmu_context.h>
 #include <asm/mipsregs.h>
 #include <asm/cacheflush.h>
@@ -111,7 +112,7 @@ static int vpe0limit;
 static int ipibuffers;
 static int nostlb;
 static int asidmask;
-unsigned int smtc_asid_mask = 0xff;
+unsigned long smtc_asid_mask = 0xff;
 
 static int __init vpe0tcs(char *str)
 {
@@ -858,7 +859,6 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
         unsigned long flags;
         int mtflags;
         unsigned long tcrestart;
-        extern void r4k_wait_irqoff(void), __pastwait(void);
         int set_resched_flag = (type == LINUX_SMP_IPI &&
                                 action == SMP_RESCHEDULE_YOURSELF);
 
@@ -914,8 +914,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
                          */
                         if (cpu_wait == r4k_wait_irqoff) {
                                 tcrestart = read_tc_c0_tcrestart();
-                                if (tcrestart >= (unsigned long)r4k_wait_irqoff
-                                    && tcrestart < (unsigned long)__pastwait) {
+                                if (address_is_in_r4k_wait_irqoff(tcrestart)) {
                                         write_tc_c0_tcrestart(__pastwait);
                                         tcstatus &= ~TCSTATUS_IXMT;
                                         write_tc_c0_tcstatus(tcstatus);
@@ -1395,7 +1394,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
         asid = asid_cache(cpu);
 
         do {
-                if (!ASID_MASK(ASID_INC(asid))) {
+                if (!((asid += ASID_INC) & ASID_MASK) ) {
                         if (cpu_has_vtag_icache)
                                 flush_icache_all();
                         /* Traverse all online CPUs (hack requires contiguous range) */
@@ -1414,7 +1413,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
                                                 mips_ihb();
                                         }
                                         tcstat = read_tc_c0_tcstatus();
-                                        smtc_live_asid[tlb][ASID_MASK(tcstat)] |= (asiduse)(0x1 << i);
+                                        smtc_live_asid[tlb][(tcstat & ASID_MASK)] |= (asiduse)(0x1 << i);
                                         if (!prevhalt)
                                                 write_tc_c0_tchalt(0);
                                 }
@@ -1423,7 +1422,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
                                 asid = ASID_FIRST_VERSION;
                         local_flush_tlb_all();  /* start new asid cycle */
                 }
-        } while (smtc_live_asid[tlb][ASID_MASK(asid)]);
+        } while (smtc_live_asid[tlb][(asid & ASID_MASK)]);
 
         /*
          * SMTC shares the TLB within VPEs and possibly across all VPEs.
@@ -1461,7 +1460,7 @@ void smtc_flush_tlb_asid(unsigned long asid)
                 tlb_read();
                 ehb();
                 ehi = read_c0_entryhi();
-                if (ASID_MASK(ehi) == asid) {
+                if ((ehi & ASID_MASK) == asid) {
                     /*
                      * Invalidate only entries with specified ASID,
                      * makiing sure all entries differ.