diff options
Diffstat (limited to 'arch/mips/kernel/smp_mt.c')
-rw-r--r-- | arch/mips/kernel/smp_mt.c | 47 |
1 files changed, 12 insertions, 35 deletions
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c index 794a1c3de2a4..993b8bf56aaf 100644 --- a/arch/mips/kernel/smp_mt.c +++ b/arch/mips/kernel/smp_mt.c | |||
@@ -68,6 +68,8 @@ void __init sanitize_tlb_entries(void) | |||
68 | 68 | ||
69 | set_c0_mvpcontrol(MVPCONTROL_VPC); | 69 | set_c0_mvpcontrol(MVPCONTROL_VPC); |
70 | 70 | ||
71 | back_to_back_c0_hazard(); | ||
72 | |||
71 | /* Disable TLB sharing */ | 73 | /* Disable TLB sharing */ |
72 | clear_c0_mvpcontrol(MVPCONTROL_STLB); | 74 | clear_c0_mvpcontrol(MVPCONTROL_STLB); |
73 | 75 | ||
@@ -102,35 +104,6 @@ void __init sanitize_tlb_entries(void) | |||
102 | clear_c0_mvpcontrol(MVPCONTROL_VPC); | 104 | clear_c0_mvpcontrol(MVPCONTROL_VPC); |
103 | } | 105 | } |
104 | 106 | ||
105 | #if 0 | ||
106 | /* | ||
107 | * Use c0_MVPConf0 to find out how many CPUs are available, setting up | ||
108 | * phys_cpu_present_map and the logical/physical mappings. | ||
109 | */ | ||
110 | void __init prom_build_cpu_map(void) | ||
111 | { | ||
112 | int i, num, ncpus; | ||
113 | |||
114 | cpus_clear(phys_cpu_present_map); | ||
115 | |||
116 | /* assume we boot on cpu 0.... */ | ||
117 | cpu_set(0, phys_cpu_present_map); | ||
118 | __cpu_number_map[0] = 0; | ||
119 | __cpu_logical_map[0] = 0; | ||
120 | |||
121 | if (cpu_has_mipsmt) { | ||
122 | ncpus = ((read_c0_mvpconf0() & (MVPCONF0_PVPE)) >> MVPCONF0_PVPE_SHIFT) + 1; | ||
123 | for (i=1, num=0; i< NR_CPUS && i<ncpus; i++) { | ||
124 | cpu_set(i, phys_cpu_present_map); | ||
125 | __cpu_number_map[i] = ++num; | ||
126 | __cpu_logical_map[num] = i; | ||
127 | } | ||
128 | |||
129 | printk(KERN_INFO "%i available secondary CPU(s)\n", num); | ||
130 | } | ||
131 | } | ||
132 | #endif | ||
133 | |||
134 | static void ipi_resched_dispatch (struct pt_regs *regs) | 107 | static void ipi_resched_dispatch (struct pt_regs *regs) |
135 | { | 108 | { |
136 | do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs); | 109 | do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs); |
@@ -170,7 +143,7 @@ static struct irqaction irq_call = { | |||
170 | * Make sure all CPU's are in a sensible state before we boot any of the | 143 | * Make sure all CPU's are in a sensible state before we boot any of the |
171 | * secondarys | 144 | * secondarys |
172 | */ | 145 | */ |
173 | void prom_prepare_cpus(unsigned int max_cpus) | 146 | void plat_smp_setup(void) |
174 | { | 147 | { |
175 | unsigned long val; | 148 | unsigned long val; |
176 | int i, num; | 149 | int i, num; |
@@ -206,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
206 | write_vpe_c0_vpeconf0(tmp); | 179 | write_vpe_c0_vpeconf0(tmp); |
207 | 180 | ||
208 | /* Record this as available CPU */ | 181 | /* Record this as available CPU */ |
209 | if (i < max_cpus) { | 182 | cpu_set(i, phys_cpu_present_map); |
210 | cpu_set(i, phys_cpu_present_map); | 183 | __cpu_number_map[i] = ++num; |
211 | __cpu_number_map[i] = ++num; | 184 | __cpu_logical_map[num] = i; |
212 | __cpu_logical_map[num] = i; | ||
213 | } | ||
214 | } | 185 | } |
215 | 186 | ||
216 | /* disable multi-threading with TC's */ | 187 | /* disable multi-threading with TC's */ |
@@ -222,6 +193,9 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
222 | 193 | ||
223 | /* set config to be the same as vpe0, particularly kseg0 coherency alg */ | 194 | /* set config to be the same as vpe0, particularly kseg0 coherency alg */ |
224 | write_vpe_c0_config( read_c0_config()); | 195 | write_vpe_c0_config( read_c0_config()); |
196 | |||
197 | /* Propagate Config7 */ | ||
198 | write_vpe_c0_config7(read_c0_config7()); | ||
225 | } | 199 | } |
226 | 200 | ||
227 | } | 201 | } |
@@ -265,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
265 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); | 239 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); |
266 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); | 240 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); |
267 | } | 241 | } |
242 | } | ||
268 | 243 | ||
244 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
245 | { | ||
269 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 246 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
270 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; | 247 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; |
271 | 248 | ||