aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/irq-msc01.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
-rw-r--r--arch/mips/kernel/irq-msc01.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 97ebdc754b9e..f8cd1ac64d88 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
174 174
175 switch (imp->im_type) { 175 switch (imp->im_type) {
176 case MSC01_IRQ_EDGE: 176 case MSC01_IRQ_EDGE:
177 irq_desc[base+n].handler = &msc_edgeirq_type; 177 irq_desc[base+n].chip = &msc_edgeirq_type;
178 if (cpu_has_veic) 178 if (cpu_has_veic)
179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); 179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
180 else 180 else
181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); 181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
182 break; 182 break;
183 case MSC01_IRQ_LEVEL: 183 case MSC01_IRQ_LEVEL:
184 irq_desc[base+n].handler = &msc_levelirq_type; 184 irq_desc[base+n].chip = &msc_levelirq_type;
185 if (cpu_has_veic) 185 if (cpu_has_veic)
186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); 186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
187 else 187 else