diff options
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r-- | arch/mips/kernel/genex.S | 41 |
1 files changed, 39 insertions, 2 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index c6ada98ee042..01dcbe38fa01 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <asm/stackframe.h> | 20 | #include <asm/stackframe.h> |
21 | #include <asm/war.h> | 21 | #include <asm/war.h> |
22 | #include <asm/page.h> | 22 | #include <asm/page.h> |
23 | #include <asm/thread_info.h> | ||
23 | 24 | ||
24 | #define PANIC_PIC(msg) \ | 25 | #define PANIC_PIC(msg) \ |
25 | .set push; \ | 26 | .set push; \ |
@@ -126,7 +127,42 @@ handle_vcei: | |||
126 | 127 | ||
127 | __FINIT | 128 | __FINIT |
128 | 129 | ||
130 | .align 5 /* 32 byte rollback region */ | ||
131 | LEAF(r4k_wait) | ||
132 | .set push | ||
133 | .set noreorder | ||
134 | /* start of rollback region */ | ||
135 | LONG_L t0, TI_FLAGS($28) | ||
136 | nop | ||
137 | andi t0, _TIF_NEED_RESCHED | ||
138 | bnez t0, 1f | ||
139 | nop | ||
140 | nop | ||
141 | nop | ||
142 | .set mips3 | ||
143 | wait | ||
144 | /* end of rollback region (the region size must be power of two) */ | ||
145 | .set pop | ||
146 | 1: | ||
147 | jr ra | ||
148 | END(r4k_wait) | ||
149 | |||
150 | .macro BUILD_ROLLBACK_PROLOGUE handler | ||
151 | FEXPORT(rollback_\handler) | ||
152 | .set push | ||
153 | .set noat | ||
154 | MFC0 k0, CP0_EPC | ||
155 | PTR_LA k1, r4k_wait | ||
156 | ori k0, 0x1f /* 32 byte rollback region */ | ||
157 | xori k0, 0x1f | ||
158 | bne k0, k1, 9f | ||
159 | MTC0 k0, CP0_EPC | ||
160 | 9: | ||
161 | .set pop | ||
162 | .endm | ||
163 | |||
129 | .align 5 | 164 | .align 5 |
165 | BUILD_ROLLBACK_PROLOGUE handle_int | ||
130 | NESTED(handle_int, PT_SIZE, sp) | 166 | NESTED(handle_int, PT_SIZE, sp) |
131 | #ifdef CONFIG_TRACE_IRQFLAGS | 167 | #ifdef CONFIG_TRACE_IRQFLAGS |
132 | /* | 168 | /* |
@@ -201,6 +237,7 @@ NESTED(except_vec_ejtag_debug, 0, sp) | |||
201 | * This prototype is copied to ebase + n*IntCtl.VS and patched | 237 | * This prototype is copied to ebase + n*IntCtl.VS and patched |
202 | * to invoke the handler | 238 | * to invoke the handler |
203 | */ | 239 | */ |
240 | BUILD_ROLLBACK_PROLOGUE except_vec_vi | ||
204 | NESTED(except_vec_vi, 0, sp) | 241 | NESTED(except_vec_vi, 0, sp) |
205 | SAVE_SOME | 242 | SAVE_SOME |
206 | SAVE_AT | 243 | SAVE_AT |
@@ -245,8 +282,8 @@ NESTED(except_vec_vi_handler, 0, sp) | |||
245 | and t0, a0, t1 | 282 | and t0, a0, t1 |
246 | #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP | 283 | #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP |
247 | mfc0 t2, CP0_TCCONTEXT | 284 | mfc0 t2, CP0_TCCONTEXT |
248 | or t0, t0, t2 | 285 | or t2, t0, t2 |
249 | mtc0 t0, CP0_TCCONTEXT | 286 | mtc0 t2, CP0_TCCONTEXT |
250 | #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ | 287 | #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ |
251 | xor t1, t1, t0 | 288 | xor t1, t1, t0 |
252 | mtc0 t1, CP0_STATUS | 289 | mtc0 t1, CP0_STATUS |