diff options
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index bc58bd10a607..b1fb7af3c350 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -142,7 +142,7 @@ int __cpuinitdata mips_dsp_disabled; | |||
142 | 142 | ||
143 | static int __init dsp_disable(char *s) | 143 | static int __init dsp_disable(char *s) |
144 | { | 144 | { |
145 | cpu_data[0].ases &= ~MIPS_ASE_DSP; | 145 | cpu_data[0].ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); |
146 | mips_dsp_disabled = 1; | 146 | mips_dsp_disabled = 1; |
147 | 147 | ||
148 | return 1; | 148 | return 1; |
@@ -429,6 +429,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) | |||
429 | c->options |= MIPS_CPU_RIXI; | 429 | c->options |= MIPS_CPU_RIXI; |
430 | if (config3 & MIPS_CONF3_DSP) | 430 | if (config3 & MIPS_CONF3_DSP) |
431 | c->ases |= MIPS_ASE_DSP; | 431 | c->ases |= MIPS_ASE_DSP; |
432 | if (config3 & MIPS_CONF3_DSP2P) | ||
433 | c->ases |= MIPS_ASE_DSP2P; | ||
432 | if (config3 & MIPS_CONF3_VINT) | 434 | if (config3 & MIPS_CONF3_VINT) |
433 | c->options |= MIPS_CPU_VINT; | 435 | c->options |= MIPS_CPU_VINT; |
434 | if (config3 & MIPS_CONF3_VEIC) | 436 | if (config3 & MIPS_CONF3_VEIC) |
@@ -1180,7 +1182,7 @@ __cpuinit void cpu_probe(void) | |||
1180 | c->options &= ~MIPS_CPU_FPU; | 1182 | c->options &= ~MIPS_CPU_FPU; |
1181 | 1183 | ||
1182 | if (mips_dsp_disabled) | 1184 | if (mips_dsp_disabled) |
1183 | c->ases &= ~MIPS_ASE_DSP; | 1185 | c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); |
1184 | 1186 | ||
1185 | if (c->options & MIPS_CPU_FPU) { | 1187 | if (c->options & MIPS_CPU_FPU) { |
1186 | c->fpu_id = cpu_get_fpu_id(); | 1188 | c->fpu_id = cpu_get_fpu_id(); |
@@ -1194,8 +1196,11 @@ __cpuinit void cpu_probe(void) | |||
1194 | } | 1196 | } |
1195 | } | 1197 | } |
1196 | 1198 | ||
1197 | if (cpu_has_mips_r2) | 1199 | if (cpu_has_mips_r2) { |
1198 | c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; | 1200 | c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; |
1201 | /* R2 has Performance Counter Interrupt indicator */ | ||
1202 | c->options |= MIPS_CPU_PCI; | ||
1203 | } | ||
1199 | else | 1204 | else |
1200 | c->srsets = 1; | 1205 | c->srsets = 1; |
1201 | 1206 | ||