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Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c54
1 files changed, 27 insertions, 27 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5099201fb7bc..6ae7ce4ac63e 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -340,7 +340,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
340 __cpu_name[cpu] = "R2000"; 340 __cpu_name[cpu] = "R2000";
341 c->isa_level = MIPS_CPU_ISA_I; 341 c->isa_level = MIPS_CPU_ISA_I;
342 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 342 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
343 MIPS_CPU_NOFPUEX; 343 MIPS_CPU_NOFPUEX;
344 if (__cpu_has_fpu()) 344 if (__cpu_has_fpu())
345 c->options |= MIPS_CPU_FPU; 345 c->options |= MIPS_CPU_FPU;
346 c->tlbsize = 64; 346 c->tlbsize = 64;
@@ -361,7 +361,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
361 } 361 }
362 c->isa_level = MIPS_CPU_ISA_I; 362 c->isa_level = MIPS_CPU_ISA_I;
363 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 363 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
364 MIPS_CPU_NOFPUEX; 364 MIPS_CPU_NOFPUEX;
365 if (__cpu_has_fpu()) 365 if (__cpu_has_fpu())
366 c->options |= MIPS_CPU_FPU; 366 c->options |= MIPS_CPU_FPU;
367 c->tlbsize = 64; 367 c->tlbsize = 64;
@@ -387,8 +387,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
387 387
388 c->isa_level = MIPS_CPU_ISA_III; 388 c->isa_level = MIPS_CPU_ISA_III;
389 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 389 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
390 MIPS_CPU_WATCH | MIPS_CPU_VCE | 390 MIPS_CPU_WATCH | MIPS_CPU_VCE |
391 MIPS_CPU_LLSC; 391 MIPS_CPU_LLSC;
392 c->tlbsize = 48; 392 c->tlbsize = 48;
393 break; 393 break;
394 case PRID_IMP_VR41XX: 394 case PRID_IMP_VR41XX:
@@ -434,7 +434,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
434 __cpu_name[cpu] = "R4300"; 434 __cpu_name[cpu] = "R4300";
435 c->isa_level = MIPS_CPU_ISA_III; 435 c->isa_level = MIPS_CPU_ISA_III;
436 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 436 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
437 MIPS_CPU_LLSC; 437 MIPS_CPU_LLSC;
438 c->tlbsize = 32; 438 c->tlbsize = 32;
439 break; 439 break;
440 case PRID_IMP_R4600: 440 case PRID_IMP_R4600:
@@ -446,7 +446,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
446 c->tlbsize = 48; 446 c->tlbsize = 48;
447 break; 447 break;
448 #if 0 448 #if 0
449 case PRID_IMP_R4650: 449 case PRID_IMP_R4650:
450 /* 450 /*
451 * This processor doesn't have an MMU, so it's not 451 * This processor doesn't have an MMU, so it's not
452 * "real easy" to run Linux on it. It is left purely 452 * "real easy" to run Linux on it. It is left purely
@@ -455,9 +455,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
455 */ 455 */
456 c->cputype = CPU_R4650; 456 c->cputype = CPU_R4650;
457 __cpu_name[cpu] = "R4650"; 457 __cpu_name[cpu] = "R4650";
458 c->isa_level = MIPS_CPU_ISA_III; 458 c->isa_level = MIPS_CPU_ISA_III;
459 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; 459 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
460 c->tlbsize = 48; 460 c->tlbsize = 48;
461 break; 461 break;
462 #endif 462 #endif
463 case PRID_IMP_TX39: 463 case PRID_IMP_TX39:
@@ -488,7 +488,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
488 __cpu_name[cpu] = "R4700"; 488 __cpu_name[cpu] = "R4700";
489 c->isa_level = MIPS_CPU_ISA_III; 489 c->isa_level = MIPS_CPU_ISA_III;
490 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 490 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
491 MIPS_CPU_LLSC; 491 MIPS_CPU_LLSC;
492 c->tlbsize = 48; 492 c->tlbsize = 48;
493 break; 493 break;
494 case PRID_IMP_TX49: 494 case PRID_IMP_TX49:
@@ -505,7 +505,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
505 __cpu_name[cpu] = "R5000"; 505 __cpu_name[cpu] = "R5000";
506 c->isa_level = MIPS_CPU_ISA_IV; 506 c->isa_level = MIPS_CPU_ISA_IV;
507 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 507 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
508 MIPS_CPU_LLSC; 508 MIPS_CPU_LLSC;
509 c->tlbsize = 48; 509 c->tlbsize = 48;
510 break; 510 break;
511 case PRID_IMP_R5432: 511 case PRID_IMP_R5432:
@@ -513,7 +513,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
513 __cpu_name[cpu] = "R5432"; 513 __cpu_name[cpu] = "R5432";
514 c->isa_level = MIPS_CPU_ISA_IV; 514 c->isa_level = MIPS_CPU_ISA_IV;
515 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 515 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
516 MIPS_CPU_WATCH | MIPS_CPU_LLSC; 516 MIPS_CPU_WATCH | MIPS_CPU_LLSC;
517 c->tlbsize = 48; 517 c->tlbsize = 48;
518 break; 518 break;
519 case PRID_IMP_R5500: 519 case PRID_IMP_R5500:
@@ -521,7 +521,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
521 __cpu_name[cpu] = "R5500"; 521 __cpu_name[cpu] = "R5500";
522 c->isa_level = MIPS_CPU_ISA_IV; 522 c->isa_level = MIPS_CPU_ISA_IV;
523 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 523 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
524 MIPS_CPU_WATCH | MIPS_CPU_LLSC; 524 MIPS_CPU_WATCH | MIPS_CPU_LLSC;
525 c->tlbsize = 48; 525 c->tlbsize = 48;
526 break; 526 break;
527 case PRID_IMP_NEVADA: 527 case PRID_IMP_NEVADA:
@@ -529,7 +529,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
529 __cpu_name[cpu] = "Nevada"; 529 __cpu_name[cpu] = "Nevada";
530 c->isa_level = MIPS_CPU_ISA_IV; 530 c->isa_level = MIPS_CPU_ISA_IV;
531 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 531 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
532 MIPS_CPU_DIVEC | MIPS_CPU_LLSC; 532 MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
533 c->tlbsize = 48; 533 c->tlbsize = 48;
534 break; 534 break;
535 case PRID_IMP_R6000: 535 case PRID_IMP_R6000:
@@ -537,7 +537,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
537 __cpu_name[cpu] = "R6000"; 537 __cpu_name[cpu] = "R6000";
538 c->isa_level = MIPS_CPU_ISA_II; 538 c->isa_level = MIPS_CPU_ISA_II;
539 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | 539 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
540 MIPS_CPU_LLSC; 540 MIPS_CPU_LLSC;
541 c->tlbsize = 32; 541 c->tlbsize = 32;
542 break; 542 break;
543 case PRID_IMP_R6000A: 543 case PRID_IMP_R6000A:
@@ -545,7 +545,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
545 __cpu_name[cpu] = "R6000A"; 545 __cpu_name[cpu] = "R6000A";
546 c->isa_level = MIPS_CPU_ISA_II; 546 c->isa_level = MIPS_CPU_ISA_II;
547 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | 547 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
548 MIPS_CPU_LLSC; 548 MIPS_CPU_LLSC;
549 c->tlbsize = 32; 549 c->tlbsize = 32;
550 break; 550 break;
551 case PRID_IMP_RM7000: 551 case PRID_IMP_RM7000:
@@ -553,7 +553,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
553 __cpu_name[cpu] = "RM7000"; 553 __cpu_name[cpu] = "RM7000";
554 c->isa_level = MIPS_CPU_ISA_IV; 554 c->isa_level = MIPS_CPU_ISA_IV;
555 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 555 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
556 MIPS_CPU_LLSC; 556 MIPS_CPU_LLSC;
557 /* 557 /*
558 * Undocumented RM7000: Bit 29 in the info register of 558 * Undocumented RM7000: Bit 29 in the info register of
559 * the RM7000 v2.0 indicates if the TLB has 48 or 64 559 * the RM7000 v2.0 indicates if the TLB has 48 or 64
@@ -569,7 +569,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
569 __cpu_name[cpu] = "RM9000"; 569 __cpu_name[cpu] = "RM9000";
570 c->isa_level = MIPS_CPU_ISA_IV; 570 c->isa_level = MIPS_CPU_ISA_IV;
571 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | 571 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
572 MIPS_CPU_LLSC; 572 MIPS_CPU_LLSC;
573 /* 573 /*
574 * Bit 29 in the info register of the RM9000 574 * Bit 29 in the info register of the RM9000
575 * indicates if the TLB has 48 or 64 entries. 575 * indicates if the TLB has 48 or 64 entries.
@@ -584,8 +584,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
584 __cpu_name[cpu] = "RM8000"; 584 __cpu_name[cpu] = "RM8000";
585 c->isa_level = MIPS_CPU_ISA_IV; 585 c->isa_level = MIPS_CPU_ISA_IV;
586 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 586 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
587 MIPS_CPU_FPU | MIPS_CPU_32FPR | 587 MIPS_CPU_FPU | MIPS_CPU_32FPR |
588 MIPS_CPU_LLSC; 588 MIPS_CPU_LLSC;
589 c->tlbsize = 384; /* has weird TLB: 3-way x 128 */ 589 c->tlbsize = 384; /* has weird TLB: 3-way x 128 */
590 break; 590 break;
591 case PRID_IMP_R10000: 591 case PRID_IMP_R10000:
@@ -593,9 +593,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
593 __cpu_name[cpu] = "R10000"; 593 __cpu_name[cpu] = "R10000";
594 c->isa_level = MIPS_CPU_ISA_IV; 594 c->isa_level = MIPS_CPU_ISA_IV;
595 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | 595 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
596 MIPS_CPU_FPU | MIPS_CPU_32FPR | 596 MIPS_CPU_FPU | MIPS_CPU_32FPR |
597 MIPS_CPU_COUNTER | MIPS_CPU_WATCH | 597 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
598 MIPS_CPU_LLSC; 598 MIPS_CPU_LLSC;
599 c->tlbsize = 64; 599 c->tlbsize = 64;
600 break; 600 break;
601 case PRID_IMP_R12000: 601 case PRID_IMP_R12000:
@@ -603,9 +603,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
603 __cpu_name[cpu] = "R12000"; 603 __cpu_name[cpu] = "R12000";
604 c->isa_level = MIPS_CPU_ISA_IV; 604 c->isa_level = MIPS_CPU_ISA_IV;
605 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | 605 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
606 MIPS_CPU_FPU | MIPS_CPU_32FPR | 606 MIPS_CPU_FPU | MIPS_CPU_32FPR |
607 MIPS_CPU_COUNTER | MIPS_CPU_WATCH | 607 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
608 MIPS_CPU_LLSC; 608 MIPS_CPU_LLSC;
609 c->tlbsize = 64; 609 c->tlbsize = 64;
610 break; 610 break;
611 case PRID_IMP_R14000: 611 case PRID_IMP_R14000:
@@ -613,9 +613,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
613 __cpu_name[cpu] = "R14000"; 613 __cpu_name[cpu] = "R14000";
614 c->isa_level = MIPS_CPU_ISA_IV; 614 c->isa_level = MIPS_CPU_ISA_IV;
615 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | 615 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
616 MIPS_CPU_FPU | MIPS_CPU_32FPR | 616 MIPS_CPU_FPU | MIPS_CPU_32FPR |
617 MIPS_CPU_COUNTER | MIPS_CPU_WATCH | 617 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
618 MIPS_CPU_LLSC; 618 MIPS_CPU_LLSC;
619 c->tlbsize = 64; 619 c->tlbsize = 64;
620 break; 620 break;
621 case PRID_IMP_LOONGSON2: 621 case PRID_IMP_LOONGSON2:
@@ -739,7 +739,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
739 if (config3 & MIPS_CONF3_VEIC) 739 if (config3 & MIPS_CONF3_VEIC)
740 c->options |= MIPS_CPU_VEIC; 740 c->options |= MIPS_CPU_VEIC;
741 if (config3 & MIPS_CONF3_MT) 741 if (config3 & MIPS_CONF3_MT)
742 c->ases |= MIPS_ASE_MIPSMT; 742 c->ases |= MIPS_ASE_MIPSMT;
743 if (config3 & MIPS_CONF3_ULRI) 743 if (config3 & MIPS_CONF3_ULRI)
744 c->options |= MIPS_CPU_ULRI; 744 c->options |= MIPS_CPU_ULRI;
745 745
@@ -767,7 +767,7 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
767 767
768 /* MIPS32 or MIPS64 compliant CPU. */ 768 /* MIPS32 or MIPS64 compliant CPU. */
769 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | 769 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
770 MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK; 770 MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
771 771
772 c->scache.flags = MIPS_CACHE_NOT_PRESENT; 772 c->scache.flags = MIPS_CACHE_NOT_PRESENT;
773 773
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 15:09:04 -0500