diff options
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 97c03865c06a..dde2adf1481c 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -746,14 +746,6 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) | |||
746 | { | 746 | { |
747 | decode_configs(c); | 747 | decode_configs(c); |
748 | 748 | ||
749 | /* | ||
750 | * For historical reasons the SB1 comes with it's own variant of | ||
751 | * cache code which eventually will be folded into c-r4k.c. Until | ||
752 | * then we pretend it's got it's own cache architecture. | ||
753 | */ | ||
754 | c->options &= ~MIPS_CPU_4K_CACHE; | ||
755 | c->options |= MIPS_CPU_SB1_CACHE; | ||
756 | |||
757 | switch (c->processor_id & 0xff00) { | 749 | switch (c->processor_id & 0xff00) { |
758 | case PRID_IMP_SB1: | 750 | case PRID_IMP_SB1: |
759 | c->cputype = CPU_SB1; | 751 | c->cputype = CPU_SB1; |