diff options
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 35 |
1 files changed, 30 insertions, 5 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index d00f8768e2a0..fac48ad27b34 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) | |||
435 | } | 435 | } |
436 | } | 436 | } |
437 | 437 | ||
438 | static char unknown_isa[] __initdata = KERN_ERR \ | ||
439 | "Unsupported ISA type, c0.config0: %d."; | ||
440 | |||
438 | static inline unsigned int decode_config0(struct cpuinfo_mips *c) | 441 | static inline unsigned int decode_config0(struct cpuinfo_mips *c) |
439 | { | 442 | { |
440 | unsigned int config0; | 443 | unsigned int config0; |
@@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) | |||
447 | isa = (config0 & MIPS_CONF_AT) >> 13; | 450 | isa = (config0 & MIPS_CONF_AT) >> 13; |
448 | switch (isa) { | 451 | switch (isa) { |
449 | case 0: | 452 | case 0: |
450 | c->isa_level = MIPS_CPU_ISA_M32R1; | 453 | switch ((config0 >> 10) & 7) { |
454 | case 0: | ||
455 | c->isa_level = MIPS_CPU_ISA_M32R1; | ||
456 | break; | ||
457 | case 1: | ||
458 | c->isa_level = MIPS_CPU_ISA_M32R2; | ||
459 | break; | ||
460 | default: | ||
461 | goto unknown; | ||
462 | } | ||
451 | break; | 463 | break; |
452 | case 2: | 464 | case 2: |
453 | c->isa_level = MIPS_CPU_ISA_M64R1; | 465 | switch ((config0 >> 10) & 7) { |
466 | case 0: | ||
467 | c->isa_level = MIPS_CPU_ISA_M64R1; | ||
468 | break; | ||
469 | case 1: | ||
470 | c->isa_level = MIPS_CPU_ISA_M64R2; | ||
471 | break; | ||
472 | default: | ||
473 | goto unknown; | ||
474 | } | ||
454 | break; | 475 | break; |
455 | default: | 476 | default: |
456 | panic("Unsupported ISA type, cp0.config0.at: %d.", isa); | 477 | goto unknown; |
457 | } | 478 | } |
458 | 479 | ||
459 | return config0 & MIPS_CONF_M; | 480 | return config0 & MIPS_CONF_M; |
481 | |||
482 | unknown: | ||
483 | panic(unknown_isa, config0); | ||
460 | } | 484 | } |
461 | 485 | ||
462 | static inline unsigned int decode_config1(struct cpuinfo_mips *c) | 486 | static inline unsigned int decode_config1(struct cpuinfo_mips *c) |
@@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) | |||
568 | break; | 592 | break; |
569 | case PRID_IMP_34K: | 593 | case PRID_IMP_34K: |
570 | c->cputype = CPU_34K; | 594 | c->cputype = CPU_34K; |
571 | c->isa_level = MIPS_CPU_ISA_M32R1; | ||
572 | break; | 595 | break; |
573 | } | 596 | } |
574 | } | 597 | } |
@@ -691,7 +714,9 @@ __init void cpu_probe(void) | |||
691 | c->fpu_id = cpu_get_fpu_id(); | 714 | c->fpu_id = cpu_get_fpu_id(); |
692 | 715 | ||
693 | if (c->isa_level == MIPS_CPU_ISA_M32R1 || | 716 | if (c->isa_level == MIPS_CPU_ISA_M32R1 || |
694 | c->isa_level == MIPS_CPU_ISA_M64R1) { | 717 | c->isa_level == MIPS_CPU_ISA_M32R2 || |
718 | c->isa_level == MIPS_CPU_ISA_M64R1 || | ||
719 | c->isa_level == MIPS_CPU_ISA_M64R2) { | ||
695 | if (c->fpu_id & MIPS_FPIR_3D) | 720 | if (c->fpu_id & MIPS_FPIR_3D) |
696 | c->ases |= MIPS_ASE_MIPS3D; | 721 | c->ases |= MIPS_ASE_MIPS3D; |
697 | } | 722 | } |